Add software breakpoint support for Linux aarch64.

See http://reviews.llvm.org/D4969 for details.

Change by Paul Osmialowski.

llvm-svn: 216188
This commit is contained in:
Todd Fiala 2014-08-21 16:42:31 +00:00
parent 95c0f153e4
commit 2afc596667
2 changed files with 18 additions and 0 deletions

View File

@ -421,6 +421,13 @@ PlatformLinux::GetSoftwareBreakpointTrapOpcode (Target &target,
assert(false && "CPU type not supported!");
break;
case llvm::Triple::aarch64:
{
static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
trap_opcode = g_aarch64_opcode;
trap_opcode_size = sizeof(g_aarch64_opcode);
}
break;
case llvm::Triple::x86:
case llvm::Triple::x86_64:
{

View File

@ -2921,10 +2921,15 @@ NativeProcessLinux::GetSoftwareBreakpointSize (NativeRegisterContextSP context_s
{
// FIXME put this behind a breakpoint protocol class that can be
// set per architecture. Need ARM, MIPS support here.
static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
static const uint8_t g_i386_opcode [] = { 0xCC };
switch (m_arch.GetMachine ())
{
case llvm::Triple::aarch64:
actual_opcode_size = static_cast<uint32_t> (sizeof(g_aarch64_opcode));
return Error ();
case llvm::Triple::x86:
case llvm::Triple::x86_64:
actual_opcode_size = static_cast<uint32_t> (sizeof(g_i386_opcode));
@ -2950,10 +2955,16 @@ NativeProcessLinux::GetSoftwareBreakpointTrapOpcode (size_t trap_opcode_size_hin
{
// FIXME put this behind a breakpoint protocol class that can be
// set per architecture. Need ARM, MIPS support here.
static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
static const uint8_t g_i386_opcode [] = { 0xCC };
switch (m_arch.GetMachine ())
{
case llvm::Triple::aarch64:
trap_opcode_bytes = g_aarch64_opcode;
actual_opcode_size = sizeof(g_aarch64_opcode);
return Error ();
case llvm::Triple::x86:
case llvm::Triple::x86_64:
trap_opcode_bytes = g_i386_opcode;