forked from OSchip/llvm-project
Add software breakpoint support for Linux aarch64.
See http://reviews.llvm.org/D4969 for details. Change by Paul Osmialowski. llvm-svn: 216188
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@ -421,6 +421,13 @@ PlatformLinux::GetSoftwareBreakpointTrapOpcode (Target &target,
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assert(false && "CPU type not supported!");
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break;
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case llvm::Triple::aarch64:
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{
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static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
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trap_opcode = g_aarch64_opcode;
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trap_opcode_size = sizeof(g_aarch64_opcode);
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}
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break;
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case llvm::Triple::x86:
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case llvm::Triple::x86_64:
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{
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@ -2921,10 +2921,15 @@ NativeProcessLinux::GetSoftwareBreakpointSize (NativeRegisterContextSP context_s
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{
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// FIXME put this behind a breakpoint protocol class that can be
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// set per architecture. Need ARM, MIPS support here.
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static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
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static const uint8_t g_i386_opcode [] = { 0xCC };
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switch (m_arch.GetMachine ())
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{
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case llvm::Triple::aarch64:
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actual_opcode_size = static_cast<uint32_t> (sizeof(g_aarch64_opcode));
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return Error ();
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case llvm::Triple::x86:
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case llvm::Triple::x86_64:
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actual_opcode_size = static_cast<uint32_t> (sizeof(g_i386_opcode));
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@ -2950,10 +2955,16 @@ NativeProcessLinux::GetSoftwareBreakpointTrapOpcode (size_t trap_opcode_size_hin
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{
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// FIXME put this behind a breakpoint protocol class that can be
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// set per architecture. Need ARM, MIPS support here.
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static const uint8_t g_aarch64_opcode[] = { 0x00, 0x00, 0x20, 0xd4 };
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static const uint8_t g_i386_opcode [] = { 0xCC };
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switch (m_arch.GetMachine ())
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{
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case llvm::Triple::aarch64:
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trap_opcode_bytes = g_aarch64_opcode;
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actual_opcode_size = sizeof(g_aarch64_opcode);
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return Error ();
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case llvm::Triple::x86:
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case llvm::Triple::x86_64:
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trap_opcode_bytes = g_i386_opcode;
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