forked from OSchip/llvm-project
Coding style fixes to recent patches. NFC.
llvm-svn: 229312
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00bd79d794
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@ -6651,7 +6651,7 @@ static SDValue matchAddSub(const BuildVectorSDNode *BV, SelectionDAG &DAG,
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bool AddFound = false;
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bool AddFound = false;
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bool SubFound = false;
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bool SubFound = false;
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for (unsigned i = 0, e = NumElts; i != e; i++) {
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for (unsigned i = 0, e = NumElts; i != e; ++i) {
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SDValue Op = BV->getOperand(i);
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SDValue Op = BV->getOperand(i);
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// Skip 'undef' values.
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// Skip 'undef' values.
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@ -7926,10 +7926,10 @@ static SDValue lowerVectorShuffleAsBitShift(SDLoc DL, MVT VT, SDValue V1,
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bool MatchLeft = true, MatchRight = true;
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bool MatchLeft = true, MatchRight = true;
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for (int i = 0; i != Size; i += Scale) {
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for (int i = 0; i != Size; i += Scale) {
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for (int j = 0; j != Shift; j++) {
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for (int j = 0; j != Shift; ++j) {
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MatchLeft &= Zeroable[i + j];
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MatchLeft &= Zeroable[i + j];
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}
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}
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for (int j = Scale - Shift; j != Scale; j++) {
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for (int j = Scale - Shift; j != Scale; ++j) {
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MatchRight &= Zeroable[i + j];
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MatchRight &= Zeroable[i + j];
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}
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}
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}
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}
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@ -7963,7 +7963,7 @@ static SDValue lowerVectorShuffleAsBitShift(SDLoc DL, MVT VT, SDValue V1,
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// multiple to see if we can find a match with the moved element indices
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// multiple to see if we can find a match with the moved element indices
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// and that the shifted in elements are all zeroable.
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// and that the shifted in elements are all zeroable.
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for (int Scale = 2; Scale * VT.getScalarSizeInBits() <= 64; Scale *= 2)
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for (int Scale = 2; Scale * VT.getScalarSizeInBits() <= 64; Scale *= 2)
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for (int Shift = 1; Shift != Scale; Shift++)
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for (int Shift = 1; Shift != Scale; ++Shift)
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if (SDValue BitShift = MatchBitShift(Shift, Scale))
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if (SDValue BitShift = MatchBitShift(Shift, Scale))
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return BitShift;
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return BitShift;
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@ -8132,7 +8132,7 @@ static SDValue lowerVectorShuffleAsZeroOrAnyExtend(
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// Returns one of the source operands if the shuffle can be reduced to a
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// Returns one of the source operands if the shuffle can be reduced to a
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// MOVQ, copying the lower 64-bits and zero-extending to the upper 64-bits.
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// MOVQ, copying the lower 64-bits and zero-extending to the upper 64-bits.
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auto CanZExtLowHalf = [&]() {
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auto CanZExtLowHalf = [&]() {
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for (int i = NumElements / 2; i != NumElements; i++)
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for (int i = NumElements / 2; i != NumElements; ++i)
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if (!Zeroable[i])
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if (!Zeroable[i])
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return SDValue();
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return SDValue();
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if (isSequentialOrUndefInRange(Mask, 0, NumElements / 2, 0))
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if (isSequentialOrUndefInRange(Mask, 0, NumElements / 2, 0))
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@ -8385,7 +8385,7 @@ static SDValue lowerVectorShuffleAsInsertPS(SDValue Op, SDValue V1, SDValue V2,
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int V2DstIndex = -1;
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int V2DstIndex = -1;
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bool V1UsedInPlace = false;
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bool V1UsedInPlace = false;
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for (int i = 0; i < 4; i++) {
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for (int i = 0; i < 4; ++i) {
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// Synthesize a zero mask from the zeroable elements (includes undefs).
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// Synthesize a zero mask from the zeroable elements (includes undefs).
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if (Zeroable[i]) {
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if (Zeroable[i]) {
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ZMask |= 1 << i;
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ZMask |= 1 << i;
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