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[X86][Costmodel] Load/store i16 Stride=4 VF=32 interleaving costs 

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For this tuple, measuring becomes problematic since there's a lot of spilling going on,
but apparently all these memory ops do not affect worst-case estimate at all here.

For load we have:
https://godbolt.org/z/zP4hd8MT6 - for intels `Block RThroughput: =150.0`; for ryzens, `Block RThroughput: <=59`
So pick cost of `150`.

For store we have:
https://godbolt.org/z/vKb8zTK8E - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=24.0`
So pick cost of `64`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110548
This commit is contained in:
Roman Lebedev 2021-09-27 22:18:41 +03:00
parent ee5a050e2e
commit 2a7a768dad
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GPG Key ID: 083C3EBB4A1689E0
3 changed files with 4 additions and 2 deletions
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2
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
View File

@ -5089,6 +5089,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{4, MVT::v4i16, 17}, // (load 16i16 and) deinterleave into 4 x 4i16
{4, MVT::v8i16, 33}, // (load 32i16 and) deinterleave into 4 x 8i16
{4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16
{4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16
{8, MVT::v8i32, 40} // (load 64i32 and) deinterleave into 8 x 8i32
};
@ -5118,6 +5119,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{4, MVT::v4i16, 6}, // interleave 4 x 4i16 into 16i16 (and store)
{4, MVT::v8i16, 10}, // interleave 4 x 8i16 into 32i16 (and store)
{4, MVT::v16i16, 32}, // interleave 4 x 16i16 into 64i16 (and store)
{4, MVT::v32i16, 64}, // interleave 4 x 32i16 into 128i16 (and store)
};
if (Opcode == Instruction::Load) {

2
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
View File

@ -13,7 +13,7 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: LV: Found an estimated cost of 18 for VF 4 For instruction: %v0 = load i16, i16* %in0, align 2
; CHECK: LV: Found an estimated cost of 35 for VF 8 For instruction: %v0 = load i16, i16* %in0, align 2
; CHECK: LV: Found an estimated cost of 79 for VF 16 For instruction: %v0 = load i16, i16* %in0, align 2
; CHECK: LV: Found an estimated cost of 456 for VF 32 For instruction: %v0 = load i16, i16* %in0, align 2
; CHECK: LV: Found an estimated cost of 158 for VF 32 For instruction: %v0 = load i16, i16* %in0, align 2
; CHECK-NOT: LV: Found an estimated cost of {{[0-9]+}} for VF {{[0-9]+}} For instruction: %v0 = load i16, i16* %in0, align 2
define void @test() {

2
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
View File

@ -13,7 +13,7 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: LV: Found an estimated cost of 7 for VF 4 For instruction: store i16 %v3, i16* %out3, align 2
; CHECK: LV: Found an estimated cost of 12 for VF 8 For instruction: store i16 %v3, i16* %out3, align 2
; CHECK: LV: Found an estimated cost of 36 for VF 16 For instruction: store i16 %v3, i16* %out3, align 2
; CHECK: LV: Found an estimated cost of 456 for VF 32 For instruction: store i16 %v3, i16* %out3, align 2
; CHECK: LV: Found an estimated cost of 72 for VF 32 For instruction: store i16 %v3, i16* %out3, align 2
; CHECK-NOT: LV: Found an estimated cost of {{[0-9]+}} for VF {{[0-9]+}} For instruction: store i16 %v3, i16* %out3, align 2
define void @test() {