diff --git a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp index 24071277427a..83ba345bf252 100644 --- a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp +++ b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp @@ -42,7 +42,7 @@ using namespace llvm; static cl::opt -DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true), +DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false), cl::desc("Disable ARM specific CodeGenPrepare pass")); static cl::opt diff --git a/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll b/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll index 18df13f732ef..7a5dcae02262 100644 --- a/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll +++ b/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll @@ -1,6 +1,6 @@ -; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP -; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP -; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM +; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP +; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP +; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM ; CHECK-COMMON-LABEL: test_ult_254_inc_imm: ; CHECK-DSP: adds r0, #1 diff --git a/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll b/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll index 8587a907616d..d39cc1df18de 100644 --- a/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll +++ b/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll @@ -1,7 +1,7 @@ -; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP -; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP +; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP +; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP +; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM ; Test that ARMCodeGenPrepare can handle: ; - loops diff --git a/llvm/test/CodeGen/ARM/arm-cgp-signed.ll b/llvm/test/CodeGen/ARM/arm-cgp-signed.ll index 7494b57f4259..80d5517b95fe 100644 --- a/llvm/test/CodeGen/ARM/arm-cgp-signed.ll +++ b/llvm/test/CodeGen/ARM/arm-cgp-signed.ll @@ -1,7 +1,7 @@ -; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s -; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s -; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s +; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s +; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s +; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s ; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends. ; CHECK-LABEL: test_signed_load: