forked from OSchip/llvm-project
[X86] Remove BT/BTC/BTR/BTS rr/ri overrides
llvm-svn: 343241
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@ -121,8 +121,8 @@ def : WriteRes<WriteLAHFSAHF, [AtomPort01]> {
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let Latency = 2;
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let ResourceCycles = [2];
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}
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defm : X86WriteRes<WriteBitTest, [AtomPort01], 1, [1], 1>;
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defm : X86WriteRes<WriteBitTestSet, [AtomPort01], 1, [1], 1>;
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defm : X86WriteRes<WriteBitTest, [AtomPort1], 1, [1], 1>;
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defm : X86WriteRes<WriteBitTestSet, [AtomPort1], 1, [1], 1>;
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// This is for simple LEAs with one or two input operands.
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def : WriteRes<WriteLEA, [AtomPort1]>;
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@ -501,8 +501,7 @@ def AtomWrite1_1 : SchedWriteRes<[AtomPort1]> {
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let ResourceCycles = [1];
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}
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def : InstRW<[AtomWrite1_1], (instrs FCOMPP)>;
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def : InstRW<[AtomWrite1_1], (instregex "UCOM_F(P|PP)?r",
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"BT(C|R|S)?(16|32|64)(rr|ri8)")>;
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def : InstRW<[AtomWrite1_1], (instregex "UCOM_F(P|PP)?r")>;
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def AtomWrite1_5 : SchedWriteRes<[AtomPort1]> {
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let Latency = 5;
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