forked from OSchip/llvm-project
Allow the fast-path spilling code to attempt folding, but still leaving out remat and splitting.
llvm-svn: 55012
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daef7f43af
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2a458775db
llvm/lib/CodeGen
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@ -1624,77 +1624,86 @@ addIntervalsForSpillsFast(const LiveInterval &li,
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const TargetRegisterClass* rc = mri_->getRegClass(li.reg);
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DenseMap<MachineInstr*, unsigned> VRegMap;
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DenseMap<MachineInstr*, VNInfo*> VNMap;
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SSWeight = 0.0f;
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for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(li.reg),
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RE = mri_->reg_end(); RI != RE; ) {
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// Create a new virtual register for the spill interval.
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MachineOperand& MO = RI.getOperand();
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unsigned NewVReg = 0;
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bool newInt = false;
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if (!VRegMap.count(MO.getParent())) {
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VRegMap[MO.getParent()] = NewVReg = mri_->createVirtualRegister(rc);
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MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(li.reg);
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while (RI != mri_->reg_end()) {
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MachineInstr* MI = &*RI;
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SmallVector<unsigned, 2> Indices;
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bool HasUse = false;
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bool HasDef = false;
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for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
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MachineOperand& mop = MI->getOperand(i);
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if (!mop.isReg() || mop.getReg() != li.reg) continue;
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HasUse |= MI->getOperand(i).isUse();
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HasDef |= MI->getOperand(i).isDef();
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Indices.push_back(i);
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}
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if (!tryFoldMemoryOperand(MI, vrm, NULL, getInstructionIndex(MI),
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Indices, true, slot, li.reg)) {
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unsigned NewVReg = mri_->createVirtualRegister(rc);
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vrm.grow();
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vrm.assignVirt2StackSlot(NewVReg, slot);
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newInt = true;
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} else
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NewVReg = VRegMap[MO.getParent()];
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// Increment iterator to avoid invalidation.
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++RI;
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MO.setReg(NewVReg);
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// create a new register for this spill
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LiveInterval &nI = getOrCreateInterval(NewVReg);
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// create a new register for this spill
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LiveInterval &nI = getOrCreateInterval(NewVReg);
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// the spill weight is now infinity as it
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// cannot be spilled again
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nI.weight = HUGE_VALF;
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unsigned index = getInstructionIndex(MO.getParent());
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bool HasUse = MO.isUse();
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bool HasDef = MO.isDef();
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if (!VNMap.count(MO.getParent()))
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VNMap[MO.getParent()] = nI.getNextValue(~0U, 0, getVNInfoAllocator());
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if (HasUse) {
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LiveRange LR(getLoadIndex(index), getUseIndex(index),
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VNMap[MO.getParent()]);
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DOUT << " +" << LR;
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nI.addRange(LR);
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vrm.addRestorePoint(NewVReg, MO.getParent());
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MO.setIsKill(true);
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}
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if (HasDef) {
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LiveRange LR(getDefIndex(index), getStoreIndex(index),
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VNMap[MO.getParent()]);
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DOUT << " +" << LR;
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nI.addRange(LR);
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vrm.addSpillPoint(NewVReg, true, MO.getParent());
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}
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if (newInt)
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// the spill weight is now infinity as it
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// cannot be spilled again
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nI.weight = HUGE_VALF;
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// Rewrite register operands to use the new vreg.
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for (SmallVectorImpl<unsigned>::iterator I = Indices.begin(),
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E = Indices.end(); I != E; ++I) {
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MI->getOperand(*I).setReg(NewVReg);
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if (MI->getOperand(*I).isUse())
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MI->getOperand(*I).setIsKill(true);
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}
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// Fill in the new live interval.
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unsigned index = getInstructionIndex(MI);
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if (HasUse) {
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LiveRange LR(getLoadIndex(index), getUseIndex(index),
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nI.getNextValue(~0U, 0, getVNInfoAllocator()));
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DOUT << " +" << LR;
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nI.addRange(LR);
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vrm.addRestorePoint(NewVReg, MI);
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}
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if (HasDef) {
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LiveRange LR(getDefIndex(index), getStoreIndex(index),
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nI.getNextValue(~0U, 0, getVNInfoAllocator()));
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DOUT << " +" << LR;
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nI.addRange(LR);
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vrm.addSpillPoint(NewVReg, true, MI);
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}
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added.push_back(&nI);
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DOUT << "\t\t\t\tadded new interval: ";
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DEBUG(nI.dump());
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DOUT << '\n';
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DOUT << "\t\t\t\tadded new interval: ";
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DEBUG(nI.dump());
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DOUT << '\n';
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unsigned loopDepth = loopInfo->getLoopDepth(MI->getParent());
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if (HasUse) {
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if (HasDef)
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SSWeight += getSpillWeight(true, true, loopDepth);
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else
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SSWeight += getSpillWeight(false, true, loopDepth);
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} else
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SSWeight += getSpillWeight(true, false, loopDepth);
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}
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unsigned loopDepth = loopInfo->getLoopDepth(MO.getParent()->getParent());
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if (HasUse) {
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if (HasDef)
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SSWeight += getSpillWeight(true, true, loopDepth);
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else
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SSWeight += getSpillWeight(false, true, loopDepth);
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} else
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SSWeight += getSpillWeight(true, false, loopDepth);
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RI = mri_->reg_begin(li.reg);
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}
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// Clients expect the new intervals to be returned in sorted order.
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std::sort(added.begin(), added.end(), LISorter());
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return added;
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