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[ARM] Fix integer UB in MVE load/store immediate handling. 

llvm-svn: 364635
This commit is contained in:
Simon Tatham 2019-06-28 09:28:39 +00:00
parent e662b6985a
commit 29ff1b4f46
2 changed files with 9 additions and 6 deletions
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4
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -4182,7 +4182,7 @@ static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val,
else if (!(Val & 0x80)) else if (!(Val & 0x80))
imm *= -1; imm *= -1;
if (imm != INT32_MIN) if (imm != INT32_MIN)
imm <<= shift; imm *= (1U << shift);
Inst.addOperand(MCOperand::createImm(imm)); Inst.addOperand(MCOperand::createImm(imm));
return MCDisassembler::Success; return MCDisassembler::Success;
@ -4448,7 +4448,7 @@ static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
imm *= -1; imm *= -1;
} }
if (imm != INT32_MIN) if (imm != INT32_MIN)
imm <<= shift; imm *= (1U << shift);
Inst.addOperand(MCOperand::createImm(imm)); Inst.addOperand(MCOperand::createImm(imm));
return S; return S;

11
llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
View File

@ -1621,12 +1621,15 @@ getT2AddrModeImmOpValue(const MCInst &MI, unsigned OpNum,
// If the immediate is B bits long, we need B+1 bits in order // If the immediate is B bits long, we need B+1 bits in order
// to represent the (inverse of the) sign bit. // to represent the (inverse of the) sign bit.
Value <<= (Bits + 1); Value <<= (Bits + 1);
int32_t tmp = (int32_t)MO2.getImm() >> Shift; int32_t tmp = (int32_t)MO2.getImm();
if (tmp < 0) if (tmp == INT32_MIN) { // represents subtracting zero rather than adding it
tmp = 0;
} else if (tmp < 0) {
tmp = abs(tmp); tmp = abs(tmp);
else } else {
Value |= (1U << Bits); // Set the ADD bit Value |= (1U << Bits); // Set the ADD bit
Value |= tmp & ((1U << Bits) - 1); }
Value |= (tmp >> Shift) & ((1U << Bits) - 1);
return Value; return Value;
} }