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AMDGPU: Fix assert when checking for implicit operand legality

This commit is contained in:
Matt Arsenault 2020-12-21 13:27:32 -05:00
parent 5bec082834
commit 29ed846d67
2 changed files with 22 additions and 2 deletions
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8
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
View File

@ -213,8 +213,12 @@ static bool tryChangeVGPRtoSGPRinCopy(MachineInstr &MI,
if (UseMI == &MI) if (UseMI == &MI)
continue; continue;
if (MO.isDef() || UseMI->getParent() != MI.getParent() || if (MO.isDef() || UseMI->getParent() != MI.getParent() ||
UseMI->getOpcode() <= TargetOpcode::GENERIC_OP_END || UseMI->getOpcode() <= TargetOpcode::GENERIC_OP_END)
!TII->isOperandLegal(*UseMI, UseMI->getOperandNo(&MO), &Src)) return false;
unsigned OpIdx = UseMI->getOperandNo(&MO);
if (OpIdx >= UseMI->getDesc().getNumOperands() ||
!TII->isOperandLegal(*UseMI, OpIdx, &Src))
return false; return false;
} }
// Change VGPR to SGPR destination. // Change VGPR to SGPR destination.

16
llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
View File

@ -72,3 +72,19 @@ body: |
%1:sreg_32_xm0 = COPY %0 %1:sreg_32_xm0 = COPY %0
S_ENDPGM 0, implicit %1 S_ENDPGM 0, implicit %1
... ...
# Make sure there's no assert when looking at the implicit use on S_ENDPGM
# GCN-LABEL: name: s_to_v_copy_implicit_use
# GCN: %0:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM undef %1:sreg_64, 0, 0, 0 :: (load 4, addrspace 4)
# GCN-NEXT: %2:vgpr_32 = COPY %0
# GCN-NEXT: S_ENDPGM 0, implicit %2
---
name: s_to_v_copy_implicit_use
tracksRegLiveness: true
body: |
bb.0:
%0:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM undef %2:sreg_64, 0, 0, 0 :: (load 4, addrspace 4)
%1:vgpr_32 = COPY %0
S_ENDPGM 0, implicit %1
...