diff --git a/llvm/test/DebugInfo/X86/dbg_value_direct.ll b/llvm/test/DebugInfo/X86/dbg_value_direct.ll index b366a0d6ad9d..3ac428d4b608 100644 --- a/llvm/test/DebugInfo/X86/dbg_value_direct.ll +++ b/llvm/test/DebugInfo/X86/dbg_value_direct.ll @@ -1,178 +1,205 @@ ; RUN: llc -filetype=obj -O0 -stack-protector-buffer-size=1 < %s ; Test that we handle DBG_VALUEs in a register without crashing. ; -; Generated and reduced from: (with -fsanitize=address) -; class C; -; template < typename, typename = int, typename = C > class A; -; class B -; { -; }; -; class C:B +; Generated from: (with -fsanitize=address) +; class C ; { ; public: -; C (const C &):B () -; { -; } +; C (const C &) +; { } ; }; -; template < typename _CharT, typename, typename _Alloc > class A +; class A ; { -; struct D:_Alloc -; { -; }; -; D _M_dataplus; +; struct D:C {}; +; D _M_dataplus; ; public: -; A (_CharT *); +; A (int *); ; }; -; -; template < typename _CharT, typename _Traits, -; typename _Alloc > A < _CharT > operator+ (A < _Traits, _Alloc >, -; const _CharT *) +; A operator+ (A, const char *) ; { -; A < _CharT > a (0); -; return a; -; } -; -; int -; main () -; { -; A < int >b = 0; -; A < char >c = b + "/glob_test_root/*a"; +; A a(0); +; return a; ; } -%class.A = type { %"struct.A::D" } -%"struct.A::D" = type { i8 } -%class.A.0 = type { %"struct.A::D" } -%"struct.A::D" = type { i8 } -define i32 @main() { - ret i32 0, !dbg !103 -} -declare void @llvm.dbg.declare(metadata, metadata) -define linkonce_odr void @_ZplIciiE1AIT_i1CES0_IT0_T1_S2_EPKS1_(%class.A.0* noalias sret %agg.result, %class.A*, i8*) { +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.9.0" + +%class.A = type { %"struct.A::D" } +%"struct.A::D" = type { i8 } + +@__asan_mapping_offset = linkonce_odr constant i64 17592186044416 +@__asan_mapping_scale = linkonce_odr constant i64 3 +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 1, void ()* @asan.module_ctor }] +@__asan_gen_ = private unnamed_addr constant [16 x i8] c"1 32 8 5 .addr \00", align 1 + +; Function Attrs: ssp sanitize_address uwtable +define void @_Zpl1APKc(%class.A* noalias sret %agg.result, %class.A*, i8*) #0 { entry: %MyAlloca = alloca [96 x i8], align 32 %2 = ptrtoint [96 x i8]* %MyAlloca to i64 %3 = add i64 %2, 32 %4 = inttoptr i64 %3 to i8** %5 = inttoptr i64 %2 to i64* + store i64 1102416563, i64* %5 %6 = add i64 %2, 8 %7 = inttoptr i64 %6 to i64* + store i64 ptrtoint ([16 x i8]* @__asan_gen_ to i64), i64* %7 %8 = add i64 %2, 16 %9 = inttoptr i64 %8 to i64* + store i64 ptrtoint (void (%class.A*, %class.A*, i8*)* @_Zpl1APKc to i64), i64* %9 %10 = lshr i64 %2, 3 %11 = add i64 %10, 17592186044416 %12 = inttoptr i64 %11 to i32* + store i32 -235802127, i32* %12 %13 = add i64 %11, 4 %14 = inttoptr i64 %13 to i32* + store i32 -185273344, i32* %14 %15 = add i64 %11, 8 %16 = inttoptr i64 %15 to i32* + store i32 -202116109, i32* %16 + call void @llvm.dbg.declare(metadata !{%class.A* %0}, metadata !47), !dbg !48 %17 = ptrtoint i8** %4 to i64 %18 = lshr i64 %17, 3 %19 = add i64 %18, 17592186044416 %20 = inttoptr i64 %19 to i8* %21 = load i8* %20 %22 = icmp ne i8 %21, 0 + call void @llvm.dbg.declare(metadata !{i8** %4}, metadata !49) br i1 %22, label %23, label %24 + +;