forked from OSchip/llvm-project
[mips][microMIPS] Implement CACHEE, WRPGPR and WSBH instructions
Differential Revision: http://reviews.llvm.org/D10337 llvm-svn: 249004
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@ -623,3 +623,16 @@ class POOL16C_OR16_FM_MMR6 : MicroMipsR6Inst16 {
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let Inst{6-4} = rs;
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let Inst{3-0} = 0b1001;
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}
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class POOL32A_WRPGPR_WSBH_FM_MMR6<bits<10> funct> : MipsR6Inst {
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bits<5> rt;
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bits<5> rs;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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@ -73,6 +73,8 @@ class SW_MMR6_ENC : SW32_FM_MMR6<"sw", 0x3e>;
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class SWE_MMR6_ENC : POOL32C_SWE_FM_MMR6<"swe", 0x18, 0xa, 0x7>;
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class PREFE_MMR6_ENC : POOL32C_ST_EVA_FM_MMR6<0b011000, 0b010>;
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class CACHEE_MMR6_ENC : POOL32C_ST_EVA_FM_MMR6<0b011000, 0b011>;
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class WRPGPR_MMR6_ENC : POOL32A_WRPGPR_WSBH_FM_MMR6<0x3c5>;
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class WSBH_MMR6_ENC : POOL32A_WRPGPR_WSBH_FM_MMR6<0x1ec>;
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class XOR_MMR6_ENC : ARITH_FM_MMR6<"xor", 0x310>;
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class XORI_MMR6_ENC : ADDI_FM_MMR6<"xori", 0x1c>;
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class ABS_S_MMR6_ENC : POOL32F_ABS_FM_MMR6<"abs.s", 0, 0b0001101>;
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@ -401,6 +403,19 @@ class SWE_MMR6_DESC_BASE<string opstr, DAGOperand RO, DAGOperand MO,
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class SW_MMR6_DESC : Store<"sw", GPR32Opnd>;
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class SWE_MMR6_DESC : SWE_MMR6_DESC_BASE<"swe", GPR32Opnd, mem_simm9>;
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class WRPGPR_WSBH_MMR6_DESC_BASE<string instr_asm, RegisterOperand RO>
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: MMR6Arch<instr_asm> {
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dag InOperandList = (ins RO:$rs);
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dag OutOperandList = (outs RO:$rt);
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string AsmString = !strconcat(instr_asm, "\t$rt, $rs");
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list<dag> Pattern = [];
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Format f = FrmR;
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string BaseOpcode = instr_asm;
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bit hasSideEffects = 0;
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}
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class WRPGPR_MMR6_DESC : WRPGPR_WSBH_MMR6_DESC_BASE<"wrpgpr", GPR32Opnd>;
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class WSBH_MMR6_DESC : WRPGPR_WSBH_MMR6_DESC_BASE<"wsbh", GPR32Opnd>;
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/// Floating Point Instructions
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class FARITH_MMR6_DESC_BASE<string instr_asm, RegisterOperand RC,
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InstrItinClass Itin, bit isComm,
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@ -753,8 +768,12 @@ def SELNEZ_MMR6 : R6MMR6Rel, SELNEZ_MMR6_ENC, SELNEZ_MMR6_DESC,
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def SLL_MMR6 : StdMMR6Rel, SLL_MMR6_DESC, SLL_MMR6_ENC, ISA_MICROMIPS32R6;
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def SUB_MMR6 : StdMMR6Rel, SUB_MMR6_DESC, SUB_MMR6_ENC, ISA_MICROMIPS32R6;
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def SUBU_MMR6 : StdMMR6Rel, SUBU_MMR6_DESC, SUBU_MMR6_ENC, ISA_MICROMIPS32R6;
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def PREFE_MMR6 : R6MMR6Rel, PREFE_MMR6_ENC, PREFE_MMR6_DESC, ISA_MICROMIPS32R6;
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def CACHEE_MMR6 : R6MMR6Rel, CACHEE_MMR6_ENC, CACHEE_MMR6_DESC, ISA_MICROMIPS32R6;
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def PREFE_MMR6 : StdMMR6Rel, PREFE_MMR6_ENC, PREFE_MMR6_DESC, ISA_MICROMIPS32R6;
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def CACHEE_MMR6 : StdMMR6Rel, CACHEE_MMR6_ENC, CACHEE_MMR6_DESC,
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ISA_MICROMIPS32R6;
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def WRPGPR_MMR6 : StdMMR6Rel, WRPGPR_MMR6_ENC, WRPGPR_MMR6_DESC,
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ISA_MICROMIPS32R6;
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def WSBH_MMR6 : StdMMR6Rel, WSBH_MMR6_ENC, WSBH_MMR6_DESC, ISA_MICROMIPS32R6;
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def XOR_MMR6 : StdMMR6Rel, XOR_MMR6_DESC, XOR_MMR6_ENC, ISA_MICROMIPS32R6;
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def XORI_MMR6 : StdMMR6Rel, XORI_MMR6_DESC, XORI_MMR6_ENC, ISA_MICROMIPS32R6;
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let DecoderMethod = "DecodeMemMMImm16" in {
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@ -1509,9 +1509,11 @@ def CLZ : MMRel, CountLeading0<"clz", GPR32Opnd>, CLO_FM<0x20>,
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def CLO : MMRel, CountLeading1<"clo", GPR32Opnd>, CLO_FM<0x21>,
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ISA_MIPS32_NOT_32R6_64R6;
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/// Word Swap Bytes Within Halfwords
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def WSBH : MMRel, SubwordSwap<"wsbh", GPR32Opnd, II_WSBH>, SEB_FM<2, 0x20>,
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ISA_MIPS32R2;
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let AdditionalPredicates = [NotInMicroMips] in {
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/// Word Swap Bytes Within Halfwords
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def WSBH : MMRel, SubwordSwap<"wsbh", GPR32Opnd, II_WSBH>, SEB_FM<2, 0x20>,
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ISA_MIPS32R2;
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}
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/// No operation.
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def NOP : PseudoSE<(outs), (ins), []>, PseudoInstExpansion<(SLL ZERO, ZERO, 0)>;
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@ -128,6 +128,10 @@
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0x00 0xa4 0x19 0xd0 # CHECK: subu $3, $4, $5
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0x00 0x64 0xf1 0x7c # CHECK: wrpgpr $3, $4
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0x00 0x64 0x7b 0x3c # CHECK: wsbh $3, $4
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0x00 0xa4 0x1b 0x10 # CHECK: xor $3, $4, $5
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0x70 0x64 0x04 0xd2 # CHECK: xori $3, $4, 1234
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@ -249,3 +249,9 @@
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0x02 0x26 0x0c 0x3c # CHECK: tne $6, $17
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0x01 0x07 0xfc 0x3c # CHECK: tne $7, $8, 15
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0x60 0x25 0xa6 0x08 # CHECK: cachee 1, 8($5)
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0x00 0x64 0xf1 0x7c # CHECK: wrpgpr $3, $4
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0x00 0x64 0x7b 0x3c # CHECK: wsbh $3, $4
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@ -56,3 +56,7 @@
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tlt $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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tltu $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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tne $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wrpgpr $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wrpgpr $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wsbh $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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@ -69,6 +69,8 @@
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sll $4, $3, 7 # CHECK: sll $4, $3, 7 # encoding: [0x00,0x83,0x38,0x00]
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sub $3, $4, $5 # CHECK: sub $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x90]
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subu $3, $4, $5 # CHECK: subu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xd0]
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wrpgpr $3, $4 # CHECK: wrpgpr $3, $4 # encoding: [0x00,0x64,0xf1,0x7c]
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wsbh $3, $4 # CHECK: wsbh $3, $4 # encoding: [0x00,0x64,0x7b,0x3c]
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xor $3, $4, $5 # CHECK: xor $3, $4, $5 # encoding: [0x00,0xa4,0x1b,0x10]
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xori $3, $4, 1234 # CHECK: xori $3, $4, 1234 # encoding: [0x70,0x64,0x04,0xd2]
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sw $5, 4($6) # CHECK: sw $5, 4($6) # encoding: [0xf8,0xa6,0x00,0x04]
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@ -62,3 +62,7 @@
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tlt $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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tltu $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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tne $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wrpgpr $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wrpgpr $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wsbh $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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@ -109,5 +109,8 @@ a:
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tltu $16, $sp, 15 # CHECK: tltu $16, $sp, 15 # encoding: [0x03,0xb0,0xfa,0x3c]
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tne $6, $17 # CHECK: tne $6, $17 # encoding: [0x02,0x26,0x0c,0x3c]
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tne $7, $8, 15 # CHECK: tne $7, $8, 15 # encoding: [0x01,0x07,0xfc,0x3c]
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cachee 1, 8($5) # CHECK: cachee 1, 8($5) # encoding: [0x60,0x25,0xa6,0x08]
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wrpgpr $3, $4 # CHECK: wrpgpr $3, $4 # encoding: [0x00,0x64,0xf1,0x7c]
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wsbh $3, $4 # CHECK: wsbh $3, $4 # encoding: [0x00,0x64,0x7b,0x3c]
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1:
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