forked from OSchip/llvm-project
Variety of small or trivial simplifications to the code, completely eliminated
the dependence on PhysRegClassMap llvm-svn: 5064
This commit is contained in:
Chris Lattner
parent
050d0ce094
commit
292083aaf5
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@ -12,6 +12,7 @@
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#include <iostream>
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#include <set>
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#if 0
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/// PhysRegClassMap - Construct a mapping of physical register numbers to their
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/// register classes.
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///
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@ -34,6 +35,7 @@ public:
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const TargetRegisterClass *get(unsigned Reg) { return operator[](Reg); }
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};
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#endif
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namespace {
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@ -49,9 +51,6 @@ namespace {
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// Maps SSA Regs => offsets on the stack where these values are stored
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std::map<unsigned, unsigned> VirtReg2OffsetMap;
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// Maps physical register to their register classes
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PhysRegClassMap PhysRegClasses;
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// RegsUsed - Keep track of what registers are currently in use.
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std::set<unsigned> RegsUsed;
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@ -63,7 +62,7 @@ namespace {
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public:
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RegAllocSimple(TargetMachine &tm)
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: TM(tm), RegInfo(tm.getRegisterInfo()), PhysRegClasses(RegInfo) {
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: TM(tm), RegInfo(tm.getRegisterInfo()) {
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RegsUsed.insert(RegInfo->getFramePointer());
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RegsUsed.insert(RegInfo->getStackPointer());
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@ -90,18 +89,13 @@ namespace {
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void EliminatePHINodes(MachineBasicBlock &MBB);
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bool isAvailableReg(unsigned Reg) {
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// assert(Reg < MRegisterInfo::FirstVirtualReg && "...");
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return RegsUsed.find(Reg) == RegsUsed.end();
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}
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/// getStackSpaceFor - This returns the offset of the specified virtual
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/// register on the stack, allocating space if neccesary.
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unsigned getStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass);
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/// allocateStackSpaceFor - This allocates space for the specified virtual
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/// register to be held on the stack.
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unsigned allocateStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass);
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/// Given a virtual register, returns a physical register that is currently
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/// unused.
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/// Given a virtual register, return a compatible physical register that is
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/// currently unused.
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///
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/// Side effect: marks that register as being used until manually cleared
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///
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@ -133,57 +127,52 @@ namespace {
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/// Moves value from memory into that register
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MachineBasicBlock::iterator
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moveUseToReg (MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, unsigned VirtReg,
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unsigned &PhysReg);
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moveUseToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned &PhysReg);
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/// Saves reg value on the stack (maps virtual register to stack value)
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MachineBasicBlock::iterator
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saveVirtRegToStack (MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, unsigned VirtReg,
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unsigned PhysReg);
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saveVirtRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg);
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};
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}
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/// allocateStackSpaceFor - This allocates space for the specified virtual
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/// getStackSpaceFor - This allocates space for the specified virtual
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/// register to be held on the stack.
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unsigned RegAllocSimple::allocateStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass)
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{
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if (VirtReg2OffsetMap.find(VirtReg) == VirtReg2OffsetMap.end()) {
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unsigned RegSize = regClass->getDataSize();
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unsigned RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass) {
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// Find the location VirtReg would belong...
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std::map<unsigned, unsigned>::iterator I =
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VirtReg2OffsetMap.lower_bound(VirtReg);
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// Align NumBytesAllocated. We should be using TargetData alignment stuff
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// to determine this, but we don't know the LLVM type associated with the
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// virtual register. Instead, just align to a multiple of the size for now.
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NumBytesAllocated += RegSize-1;
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NumBytesAllocated = NumBytesAllocated/RegSize*RegSize;
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if (I != VirtReg2OffsetMap.end() && I->first == VirtReg)
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return I->second; // Already has space allocated?
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// Assign the slot...
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VirtReg2OffsetMap[VirtReg] = NumBytesAllocated;
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unsigned RegSize = regClass->getDataSize();
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// Reserve the space!
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NumBytesAllocated += RegSize;
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}
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return VirtReg2OffsetMap[VirtReg];
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// Align NumBytesAllocated. We should be using TargetData alignment stuff
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// to determine this, but we don't know the LLVM type associated with the
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// virtual register. Instead, just align to a multiple of the size for now.
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NumBytesAllocated += RegSize-1;
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NumBytesAllocated = NumBytesAllocated/RegSize*RegSize;
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// Assign the slot...
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VirtReg2OffsetMap.insert(I, std::make_pair(VirtReg, NumBytesAllocated));
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// Reserve the space!
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NumBytesAllocated += RegSize;
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return NumBytesAllocated-RegSize;
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}
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unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
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const TargetRegisterClass* regClass = MF->getRegClass(virtualReg);
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unsigned physReg;
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assert(regClass);
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if (RegClassIdx.find(regClass) != RegClassIdx.end()) {
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unsigned regIdx = RegClassIdx[regClass]++;
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assert(regIdx < regClass->getNumRegs() && "Not enough registers!");
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physReg = regClass->getRegister(regIdx);
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} else {
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physReg = regClass->getRegister(0);
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// assert(physReg < regClass->getNumRegs() && "No registers in class!");
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RegClassIdx[regClass] = 1;
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}
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unsigned regIdx = RegClassIdx[regClass]++;
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assert(regIdx < regClass->getNumRegs() && "Not enough registers!");
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unsigned physReg = regClass->getRegister(regIdx);
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if (isAvailableReg(physReg))
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if (RegsUsed.find(physReg) == RegsUsed.end())
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return physReg;
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else
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return getFreeReg(virtualReg);
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@ -195,7 +184,7 @@ RegAllocSimple::moveUseToReg (MachineBasicBlock &MBB,
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unsigned VirtReg, unsigned &PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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unsigned stackOffset = getStackSpaceFor(VirtReg, regClass);
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PhysReg = getFreeReg(VirtReg);
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// Add move instruction(s)
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@ -211,7 +200,7 @@ RegAllocSimple::saveVirtRegToStack (MachineBasicBlock &MBB,
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unsigned VirtReg, unsigned PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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unsigned stackOffset = getStackSpaceFor(VirtReg, regClass);
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// Add move instruction(s)
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++NumSpilled;
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@ -226,34 +215,28 @@ RegAllocSimple::saveVirtRegToStack (MachineBasicBlock &MBB,
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void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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const MachineInstrInfo &MII = TM.getInstrInfo();
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while (MBB.front()->getOpcode() == 0) {
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while (MBB.front()->getOpcode() == MachineInstrInfo::PHI) {
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MachineInstr *MI = MBB.front();
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// Unlink the PHI node from the basic block... but don't delete the PHI
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// Unlink the PHI node from the basic block... but don't delete the PHI yet
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MBB.erase(MBB.begin());
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DEBUG(std::cerr << "num invalid regs: " << RegsUsed.size() << "\n");
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DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
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assert(MI->getOperand(0).isVirtualRegister() &&
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"PHI node doesn't write virt reg?");
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// a preliminary pass that will invalidate any registers that
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// are used by the instruction (including implicit uses)
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invalidatePhysRegs(MI);
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DEBUG(std::cerr << "num invalid regs: " << RegsUsed.size() << "\n");
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DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
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MachineOperand &targetReg = MI->getOperand(0);
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// If it's a virtual register, allocate a physical one otherwise, just use
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// whatever register is there now note: it MUST be a register -- we're
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// assigning to it!
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// Allocate a physical reg to hold this temporary.
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//
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unsigned virtualReg = (unsigned) targetReg.getAllocatedRegNum();
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unsigned physReg;
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if (targetReg.isVirtualRegister()) {
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physReg = getFreeReg(virtualReg);
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} else {
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physReg = virtualReg;
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}
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unsigned virtualReg = MI->getOperand(0).getAllocatedRegNum();
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unsigned physReg = getFreeReg(virtualReg);
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// Find the register class of the target register: should be the
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// same as the values we're trying to store there
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const TargetRegisterClass* regClass = PhysRegClasses[physReg];
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const TargetRegisterClass* regClass = MF->getRegClass(virtualReg);
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assert(regClass && "Target register class not found!");
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unsigned dataSize = regClass->getDataSize();
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@ -314,7 +297,7 @@ void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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clearAllRegs();
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}
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// really delete the instruction
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// really delete the PHI instruction now!
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delete MI;
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}
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}
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@ -327,7 +310,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// loop over each instruction
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for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
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// Made to combat the incorrect allocation of r2 = add r1, r1
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std::map<unsigned, unsigned> VirtReg2PhysRegMap;
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std::map<unsigned, unsigned> Virt2PhysRegMap;
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MachineInstr *MI = *I;
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@ -347,31 +330,26 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// make sure the same virtual register maps to the same physical
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// register in any given instruction
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unsigned physReg;
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if (VirtReg2PhysRegMap.find(virtualReg) != VirtReg2PhysRegMap.end()) {
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physReg = VirtReg2PhysRegMap[virtualReg];
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} else {
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unsigned physReg = Virt2PhysRegMap[virtualReg];
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if (physReg == 0) {
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if (op.opIsDef()) {
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if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
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// must be same register number as the first operand
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// This maps a = b + c into b += c, and saves b into a's spot
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assert(MI->getOperand(1).isRegister() &&
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MI->getOperand(1).getAllocatedRegNum() &&
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MF->getRegClass(virtualReg) ==
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PhysRegClasses[MI->getOperand(1).getAllocatedRegNum()] &&
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MI->getOperand(1).opIsUse() &&
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"Two address instruction invalid!");
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physReg = MI->getOperand(1).getAllocatedRegNum();
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} else {
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physReg = getFreeReg(virtualReg);
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}
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MachineBasicBlock::iterator J = I;
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J = saveVirtRegToStack(MBB, ++J, virtualReg, physReg);
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I = --J;
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I = --saveVirtRegToStack(MBB, ++I, virtualReg, physReg);
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} else {
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I = moveUseToReg(MBB, I, virtualReg, physReg);
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}
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VirtReg2PhysRegMap[virtualReg] = physReg;
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Virt2PhysRegMap[virtualReg] = physReg;
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}
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MI->SetMachineOperandReg(i, physReg);
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DEBUG(std::cerr << "virt: " << virtualReg <<
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@ -388,28 +366,26 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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DEBUG(std::cerr << "Machine Function " << "\n");
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MF = &Fn;
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// Loop over all of the basic blocks, eliminating virtual register references
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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AllocateBasicBlock(*MBB);
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// add prologue we should preserve callee-save registers...
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// Add prologue to the function...
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RegInfo->emitPrologue(Fn, NumBytesAllocated);
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const MachineInstrInfo &MII = TM.getInstrInfo();
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// add epilogue to restore the callee-save registers
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// loop over the basic block
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// Add epilogue to restore the callee-save registers in each exiting block
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB) {
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// check if last instruction is a RET
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if (MII.isReturn(MBB->back()->getOpcode())) {
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// this block has a return instruction, add epilogue
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// If last instruction is a return instruction, add an epilogue
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if (MII.isReturn(MBB->back()->getOpcode()))
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RegInfo->emitEpilogue(*MBB, NumBytesAllocated);
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}
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}
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cleanupAfterFunction();
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return false; // We never modify the LLVM itself.
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return true;
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}
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Pass *createSimpleX86RegisterAllocator(TargetMachine &TM) {
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