forked from OSchip/llvm-project
parent
5d1cda1bc8
commit
28d4ddab86
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@ -19,6 +19,7 @@
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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using namespace llvm;
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using namespace llvm;
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@ -123,9 +124,8 @@ bool Nios2AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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// MCAsmBackend
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// MCAsmBackend
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MCAsmBackend *llvm::createNios2AsmBackend(const Target &T,
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MCAsmBackend *llvm::createNios2AsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCRegisterInfo &MRI,
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const Triple &TT, StringRef CPU,
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const MCTargetOptions &Options) {
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const MCTargetOptions &Options) {
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return new Nios2AsmBackend(T, STI.getTargetTriple().getOS());
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return new Nios2AsmBackend(T, TT.getOS());
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}
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}
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@ -20,6 +20,7 @@ namespace llvm {
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class MCAsmBackend;
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class MCAsmBackend;
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class MCObjectWriter;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class MCTargetOptions;
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class MCTargetOptions;
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class Target;
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class Target;
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class Triple;
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class Triple;
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@ -28,8 +29,8 @@ class raw_pwrite_stream;
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Target &getTheNios2Target();
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Target &getTheNios2Target();
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MCAsmBackend *createNios2AsmBackend(const Target &T, const MCRegisterInfo &MRI,
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MCAsmBackend *createNios2AsmBackend(const Target &T, const MCSubtargetInfo &STI,
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const Triple &TT, StringRef CPU,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options);
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const MCTargetOptions &Options);
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std::unique_ptr<MCObjectWriter>
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std::unique_ptr<MCObjectWriter>
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