From 288e1af8c8485edef4ff6d3d3c388a05df3b0ef7 Mon Sep 17 00:00:00 2001 From: Jiangning Liu Date: Thu, 2 Aug 2012 08:21:27 +0000 Subject: [PATCH] Fix #13138, a bug around ARM instruction DSB encoding and decoding issue. llvm-svn: 161161 --- .../lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 70 ++++++++++---- .../ARM/Disassembler/ARMDisassembler.cpp | 13 +-- .../lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h | 30 ++++-- llvm/test/MC/ARM/basic-arm-instructions.s | 74 +++++++++++++++ llvm/test/MC/ARM/basic-thumb2-instructions.s | 68 ++++++++++++++ .../ARM/basic-arm-instructions.txt | 94 ++++++++++++------- llvm/test/MC/Disassembler/ARM/thumb2.txt | 34 ++++++- 7 files changed, 310 insertions(+), 73 deletions(-) diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 6fe6356c9312..89f7ec227ebf 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3279,29 +3279,59 @@ ARMAsmParser::OperandMatchResultTy ARMAsmParser:: parseMemBarrierOptOperand(SmallVectorImpl &Operands) { SMLoc S = Parser.getTok().getLoc(); const AsmToken &Tok = Parser.getTok(); - if (!Tok.is(AsmToken::Identifier)) - return MatchOperand_NoMatch; - StringRef OptStr = Tok.getString(); + unsigned Opt; - unsigned Opt = StringSwitch(OptStr.slice(0, OptStr.size()).lower()) - .Case("sy", ARM_MB::SY) - .Case("st", ARM_MB::ST) - .Case("sh", ARM_MB::ISH) - .Case("ish", ARM_MB::ISH) - .Case("shst", ARM_MB::ISHST) - .Case("ishst", ARM_MB::ISHST) - .Case("nsh", ARM_MB::NSH) - .Case("un", ARM_MB::NSH) - .Case("nshst", ARM_MB::NSHST) - .Case("unst", ARM_MB::NSHST) - .Case("osh", ARM_MB::OSH) - .Case("oshst", ARM_MB::OSHST) - .Default(~0U); + if (Tok.is(AsmToken::Identifier)) { + StringRef OptStr = Tok.getString(); - if (Opt == ~0U) - return MatchOperand_NoMatch; + Opt = StringSwitch(OptStr.slice(0, OptStr.size()).lower()) + .Case("sy", ARM_MB::SY) + .Case("st", ARM_MB::ST) + .Case("sh", ARM_MB::ISH) + .Case("ish", ARM_MB::ISH) + .Case("shst", ARM_MB::ISHST) + .Case("ishst", ARM_MB::ISHST) + .Case("nsh", ARM_MB::NSH) + .Case("un", ARM_MB::NSH) + .Case("nshst", ARM_MB::NSHST) + .Case("unst", ARM_MB::NSHST) + .Case("osh", ARM_MB::OSH) + .Case("oshst", ARM_MB::OSHST) + .Default(~0U); + + if (Opt == ~0U) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + } else if (Tok.is(AsmToken::Hash) || + Tok.is(AsmToken::Dollar) || + Tok.is(AsmToken::Integer)) { + if (Parser.getTok().isNot(AsmToken::Integer)) + Parser.Lex(); // Eat the '#'. + SMLoc Loc = Parser.getTok().getLoc(); + + const MCExpr *MemBarrierID; + if (getParser().ParseExpression(MemBarrierID)) { + Error(Loc, "illegal expression"); + return MatchOperand_ParseFail; + } + + const MCConstantExpr *CE = dyn_cast(MemBarrierID); + if (!CE) { + Error(Loc, "constant expression expected"); + return MatchOperand_ParseFail; + } + + int Val = CE->getValue(); + if (Val & ~0xf) { + Error(Loc, "immediate value out of range"); + return MatchOperand_ParseFail; + } + + Opt = ARM_MB::RESERVED_0 + Val; + } else + return MatchOperand_ParseFail; - Parser.Lex(); // Eat identifier token. Operands.push_back(ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S)); return MatchOperand_Success; } diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 47cca2aef0a7..6f36dcc1ef37 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -3494,19 +3494,8 @@ static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) { - switch (Val) { - default: + if (Val & ~0xf) return MCDisassembler::Fail; - case 0xF: // SY - case 0xE: // ST - case 0xB: // ISH - case 0xA: // ISHST - case 0x7: // NSH - case 0x6: // NSHST - case 0x3: // OSH - case 0x2: // OSHST - break; - } Inst.addOperand(MCOperand::CreateImm(Val)); return MCDisassembler::Success; diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h index ae11be888137..0610a0ac398c 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h @@ -120,14 +120,22 @@ namespace ARM_MB { // The Memory Barrier Option constants map directly to the 4-bit encoding of // the option field for memory barrier operations. enum MemBOpt { - SY = 15, - ST = 14, - ISH = 11, - ISHST = 10, - NSH = 7, - NSHST = 6, + RESERVED_0 = 0, + RESERVED_1 = 1, + OSHST = 2, OSH = 3, - OSHST = 2 + RESERVED_4 = 4, + RESERVED_5 = 5, + NSHST = 6, + NSH = 7, + RESERVED_8 = 8, + RESERVED_9 = 9, + ISHST = 10, + ISH = 11, + RESERVED_12 = 12, + RESERVED_13 = 13, + ST = 14, + SY = 15 }; inline static const char *MemBOptToString(unsigned val) { @@ -135,12 +143,20 @@ namespace ARM_MB { default: llvm_unreachable("Unknown memory operation"); case SY: return "sy"; case ST: return "st"; + case RESERVED_13: return "#0xd"; + case RESERVED_12: return "#0xc"; case ISH: return "ish"; case ISHST: return "ishst"; + case RESERVED_9: return "#0x9"; + case RESERVED_8: return "#0x8"; case NSH: return "nsh"; case NSHST: return "nshst"; + case RESERVED_5: return "#0x5"; + case RESERVED_4: return "#0x4"; case OSH: return "osh"; case OSHST: return "oshst"; + case RESERVED_1: return "#0x1"; + case RESERVED_0: return "#0x0"; } } } // namespace ARM_MB diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s index 45f5247bce6e..5c2a214598d1 100644 --- a/llvm/test/MC/ARM/basic-arm-instructions.s +++ b/llvm/test/MC/ARM/basic-arm-instructions.s @@ -567,6 +567,23 @@ Lforward: @------------------------------------------------------------------------------ @ DMB @------------------------------------------------------------------------------ + dmb #0xf + dmb #0xe + dmb #0xd + dmb #0xc + dmb #0xb + dmb #0xa + dmb #0x9 + dmb #0x8 + dmb #0x7 + dmb #0x6 + dmb #0x5 + dmb #0x4 + dmb #0x3 + dmb #0x2 + dmb #0x1 + dmb #0x0 + dmb sy dmb st dmb sh @@ -581,6 +598,23 @@ Lforward: dmb oshst dmb +@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] +@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] +@ CHECK: dmb #0xd @ encoding: [0x5d,0xf0,0x7f,0xf5] +@ CHECK: dmb #0xc @ encoding: [0x5c,0xf0,0x7f,0xf5] +@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] +@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x9 @ encoding: [0x59,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x8 @ encoding: [0x58,0xf0,0x7f,0xf5] +@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] +@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x5 @ encoding: [0x55,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x4 @ encoding: [0x54,0xf0,0x7f,0xf5] +@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] +@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x1 @ encoding: [0x51,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x0 @ encoding: [0x50,0xf0,0x7f,0xf5] + @ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] @ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] @@ -598,6 +632,26 @@ Lforward: @------------------------------------------------------------------------------ @ DSB @------------------------------------------------------------------------------ + dsb #0xf + dsb #0xe + dsb #0xd + dsb #0xc + dsb #0xb + dsb #0xa + dsb #0x9 + dsb #0x8 + dsb #0x7 + dsb #0x6 + dsb #0x5 + dsb #0x4 + dsb #0x3 + dsb #0x2 + dsb #0x1 + dsb #0x0 + + dsb 8 + dsb 7 + dsb sy dsb st dsb sh @@ -612,6 +666,26 @@ Lforward: dsb oshst dsb +@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] +@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] +@ CHECK: dsb #0xd @ encoding: [0x4d,0xf0,0x7f,0xf5] +@ CHECK: dsb #0xc @ encoding: [0x4c,0xf0,0x7f,0xf5] +@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] +@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x9 @ encoding: [0x49,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5] +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] +@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x5 @ encoding: [0x45,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x4 @ encoding: [0x44,0xf0,0x7f,0xf5] +@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] +@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x1 @ encoding: [0x41,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x0 @ encoding: [0x40,0xf0,0x7f,0xf5] + +@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5] +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] + @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] @ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] diff --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s index 6a048cf43f1b..31ada98d330b 100644 --- a/llvm/test/MC/ARM/basic-thumb2-instructions.s +++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s @@ -417,6 +417,23 @@ _func: @------------------------------------------------------------------------------ @ DMB @------------------------------------------------------------------------------ + dmb #0xf + dmb #0xe + dmb #0xd + dmb #0xc + dmb #0xb + dmb #0xa + dmb #0x9 + dmb #0x8 + dmb #0x7 + dmb #0x6 + dmb #0x5 + dmb #0x4 + dmb #0x3 + dmb #0x2 + dmb #0x1 + dmb #0x0 + dmb sy dmb st dmb sh @@ -431,6 +448,23 @@ _func: dmb oshst dmb +@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] +@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] +@ CHECK: dmb #0xd @ encoding: [0xbf,0xf3,0x5d,0x8f] +@ CHECK: dmb #0xc @ encoding: [0xbf,0xf3,0x5c,0x8f] +@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] +@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] +@ CHECK: dmb #0x9 @ encoding: [0xbf,0xf3,0x59,0x8f] +@ CHECK: dmb #0x8 @ encoding: [0xbf,0xf3,0x58,0x8f] +@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f] +@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f] +@ CHECK: dmb #0x5 @ encoding: [0xbf,0xf3,0x55,0x8f] +@ CHECK: dmb #0x4 @ encoding: [0xbf,0xf3,0x54,0x8f] +@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f] +@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f] +@ CHECK: dmb #0x1 @ encoding: [0xbf,0xf3,0x51,0x8f] +@ CHECK: dmb #0x0 @ encoding: [0xbf,0xf3,0x50,0x8f] + @ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] @ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] @ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] @@ -449,6 +483,23 @@ _func: @------------------------------------------------------------------------------ @ DSB @------------------------------------------------------------------------------ + dsb #0xf + dsb #0xe + dsb #0xd + dsb #0xc + dsb #0xb + dsb #0xa + dsb #0x9 + dsb #0x8 + dsb #0x7 + dsb #0x6 + dsb #0x5 + dsb #0x4 + dsb #0x3 + dsb #0x2 + dsb #0x1 + dsb #0x0 + dsb sy dsb st dsb sh @@ -463,6 +514,23 @@ _func: dsb oshst dsb +@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] +@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] +@ CHECK: dsb #0xd @ encoding: [0xbf,0xf3,0x4d,0x8f] +@ CHECK: dsb #0xc @ encoding: [0xbf,0xf3,0x4c,0x8f] +@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] +@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] +@ CHECK: dsb #0x9 @ encoding: [0xbf,0xf3,0x49,0x8f] +@ CHECK: dsb #0x8 @ encoding: [0xbf,0xf3,0x48,0x8f] +@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f] +@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f] +@ CHECK: dsb #0x5 @ encoding: [0xbf,0xf3,0x45,0x8f] +@ CHECK: dsb #0x4 @ encoding: [0xbf,0xf3,0x44,0x8f] +@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f] +@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] +@ CHECK: dsb #0x1 @ encoding: [0xbf,0xf3,0x41,0x8f] +@ CHECK: dsb #0x0 @ encoding: [0xbf,0xf3,0x40,0x8f] + @ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] @ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] @ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] diff --git a/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt index 7ef7bca539d9..1100ce64a947 100644 --- a/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt +++ b/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt @@ -475,47 +475,77 @@ #------------------------------------------------------------------------------ # DMB #------------------------------------------------------------------------------ -# CHECK: dmb sy -# CHECK: dmb st -# CHECK: dmb ish -# CHECK: dmb ishst -# CHECK: dmb nsh -# CHECK: dmb nshst -# CHECK: dmb osh -# CHECK: dmb oshst -# CHECK: dmb -0x5f 0xf0 0x7f 0xf5 -0x5e 0xf0 0x7f 0xf5 -0x5b 0xf0 0x7f 0xf5 -0x5a 0xf0 0x7f 0xf5 -0x57 0xf0 0x7f 0xf5 -0x56 0xf0 0x7f 0xf5 -0x53 0xf0 0x7f 0xf5 +# CHECK: dmb #0x0 +# CHECK: dmb #0x1 +# CHECK: dmb oshst +# CHECK: dmb osh +# CHECK: dmb #0x4 +# CHECK: dmb #0x5 +# CHECK: dmb nshst +# CHECK: dmb nsh +# CHECK: dmb #0x8 +# CHECK: dmb #0x9 +# CHECK: dmb ishst +# CHECK: dmb ish +# CHECK: dmb #0xc +# CHECK: dmb #0xd +# CHECK: dmb st +# CHECK: dmb sy + +0x50 0xf0 0x7f 0xf5 +0x51 0xf0 0x7f 0xf5 0x52 0xf0 0x7f 0xf5 +0x53 0xf0 0x7f 0xf5 +0x54 0xf0 0x7f 0xf5 +0x55 0xf0 0x7f 0xf5 +0x56 0xf0 0x7f 0xf5 +0x57 0xf0 0x7f 0xf5 +0x58 0xf0 0x7f 0xf5 +0x59 0xf0 0x7f 0xf5 +0x5a 0xf0 0x7f 0xf5 +0x5b 0xf0 0x7f 0xf5 +0x5c 0xf0 0x7f 0xf5 +0x5d 0xf0 0x7f 0xf5 +0x5e 0xf0 0x7f 0xf5 0x5f 0xf0 0x7f 0xf5 #------------------------------------------------------------------------------ # DSB #------------------------------------------------------------------------------ -# CHECK: dsb sy -# CHECK: dsb st -# CHECK: dsb ish -# CHECK: dsb ishst -# CHECK: dsb nsh -# CHECK: dsb nshst -# CHECK: dsb osh -# CHECK: dsb oshst -# CHECK: dsb -0x4f 0xf0 0x7f 0xf5 -0x4e 0xf0 0x7f 0xf5 -0x4b 0xf0 0x7f 0xf5 -0x4a 0xf0 0x7f 0xf5 -0x47 0xf0 0x7f 0xf5 -0x46 0xf0 0x7f 0xf5 -0x43 0xf0 0x7f 0xf5 +# CHECK: dsb #0x0 +# CHECK: dsb #0x1 +# CHECK: dsb oshst +# CHECK: dsb osh +# CHECK: dsb #0x4 +# CHECK: dsb #0x5 +# CHECK: dsb nshst +# CHECK: dsb nsh +# CHECK: dsb #0x8 +# CHECK: dsb #0x9 +# CHECK: dsb ishst +# CHECK: dsb ish +# CHECK: dsb #0xc +# CHECK: dsb #0xd +# CHECK: dsb st +# CHECK: dsb sy + +0x40 0xf0 0x7f 0xf5 +0x41 0xf0 0x7f 0xf5 0x42 0xf0 0x7f 0xf5 +0x43 0xf0 0x7f 0xf5 +0x44 0xf0 0x7f 0xf5 +0x45 0xf0 0x7f 0xf5 +0x46 0xf0 0x7f 0xf5 +0x47 0xf0 0x7f 0xf5 +0x48 0xf0 0x7f 0xf5 +0x49 0xf0 0x7f 0xf5 +0x4a 0xf0 0x7f 0xf5 +0x4b 0xf0 0x7f 0xf5 +0x4c 0xf0 0x7f 0xf5 +0x4d 0xf0 0x7f 0xf5 +0x4e 0xf0 0x7f 0xf5 0x4f 0xf0 0x7f 0xf5 #------------------------------------------------------------------------------ diff --git a/llvm/test/MC/Disassembler/ARM/thumb2.txt b/llvm/test/MC/Disassembler/ARM/thumb2.txt index 380983fc224d..2c363feb0854 100644 --- a/llvm/test/MC/Disassembler/ARM/thumb2.txt +++ b/llvm/test/MC/Disassembler/ARM/thumb2.txt @@ -346,23 +346,37 @@ #------------------------------------------------------------------------------ #CHECK: dmb sy #CHECK: dmb st +#CHECK: dmb #0xd +#CHECK: dmb #0xc #CHECK: dmb ish #CHECK: dmb ishst +#CHECK: dmb #0x9 +#CHECK: dmb #0x8 #CHECK: dmb nsh #CHECK: dmb nshst +#CHECK: dmb #0x5 +#CHECK: dmb #0x4 #CHECK: dmb osh #CHECK: dmb oshst -#CHECK: dmb +#CHECK: dmb #0x1 +#CHECK: dmb #0x0 0xbf 0xf3 0x5f 0x8f 0xbf 0xf3 0x5e 0x8f +0xbf 0xf3 0x5d 0x8f +0xbf 0xf3 0x5c 0x8f 0xbf 0xf3 0x5b 0x8f 0xbf 0xf3 0x5a 0x8f +0xbf 0xf3 0x59 0x8f +0xbf 0xf3 0x58 0x8f 0xbf 0xf3 0x57 0x8f 0xbf 0xf3 0x56 0x8f +0xbf 0xf3 0x55 0x8f +0xbf 0xf3 0x54 0x8f 0xbf 0xf3 0x53 0x8f 0xbf 0xf3 0x52 0x8f -0xbf 0xf3 0x5f 0x8f +0xbf 0xf3 0x51 0x8f +0xbf 0xf3 0x50 0x8f #------------------------------------------------------------------------------ @@ -370,21 +384,37 @@ #------------------------------------------------------------------------------ #CHECK: dsb sy #CHECK: dsb st +#CHECK: dsb #0xd +#CHECK: dsb #0xc #CHECK: dsb ish #CHECK: dsb ishst +#CHECK: dsb #0x9 +#CHECK: dsb #0x8 #CHECK: dsb nsh #CHECK: dsb nshst +#CHECK: dsb #0x5 +#CHECK: dsb #0x4 #CHECK: dsb osh #CHECK: dsb oshst +#CHECK: dsb #0x1 +#CHECK: dsb #0x0 0xbf 0xf3 0x4f 0x8f 0xbf 0xf3 0x4e 0x8f +0xbf 0xf3 0x4d 0x8f +0xbf 0xf3 0x4c 0x8f 0xbf 0xf3 0x4b 0x8f 0xbf 0xf3 0x4a 0x8f +0xbf 0xf3 0x49 0x8f +0xbf 0xf3 0x48 0x8f 0xbf 0xf3 0x47 0x8f 0xbf 0xf3 0x46 0x8f +0xbf 0xf3 0x45 0x8f +0xbf 0xf3 0x44 0x8f 0xbf 0xf3 0x43 0x8f 0xbf 0xf3 0x42 0x8f +0xbf 0xf3 0x41 0x8f +0xbf 0xf3 0x40 0x8f #------------------------------------------------------------------------------