maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[X86] Remove unnecessary BT InstRW overrides. 

llvm-svn: 331147
This commit is contained in:
Simon Pilgrim 2018-04-29 18:18:51 +00:00
parent afe1ee2180
commit 288c73e7be
1 changed files with 1 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
llvm/lib/Target/X86/X86ScheduleZnver1.td
View File

@ -554,10 +554,7 @@ def ZnWriteALULat2Ld : SchedWriteRes<[ZnAGU, ZnALU]> {
}
// BT.
// r,r/i.
def : InstRW<[WriteShift], (instregex "BT(16|32|64)r(r|i8)")>;
def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mr")>;
// m,i.
def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mi8")>;
// BTR BTS BTC.
@ -568,7 +565,6 @@ def ZnWriteBTRSC : SchedWriteRes<[ZnALU]> {
}
def : InstRW<[ZnWriteBTRSC], (instregex "BT(R|S|C)(16|32|64)r(r|i8)")>;
// m,r,i.
def ZnWriteBTRSCm : SchedWriteRes<[ZnAGU, ZnALU]> {
let Latency = 6;