forked from OSchip/llvm-project
[X86][SSE] Add support for target shuffle constant folding
Initial support for target shuffle constant folding in cases where all shuffle inputs are constant. We may be able to relax this and merge shuffles with only some constant inputs in the future. I've added the helper function getTargetConstantBitsFromNode (based off a similar function in X86ShuffleDecodeConstantPool.cpp) that could be reused for other cases requiring constant vector extraction. Differential Revision: https://reviews.llvm.org/D27220 llvm-svn: 288250
This commit is contained in:
Simon Pilgrim
parent
c6d8b4c044
commit
288c088c17
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@ -4622,9 +4622,9 @@ static SDValue getConstVector(ArrayRef<int> Values, MVT VT, SelectionDAG &DAG,
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return ConstsNode;
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}
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static SDValue getConstVector(ArrayRef<APInt> Values, SmallBitVector &Undefs,
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static SDValue getConstVector(ArrayRef<APInt> Bits, SmallBitVector &Undefs,
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MVT VT, SelectionDAG &DAG, const SDLoc &dl) {
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assert(Values.size() == Undefs.size() && "Unequal constant and undef arrays");
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assert(Bits.size() == Undefs.size() && "Unequal constant and undef arrays");
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SmallVector<SDValue, 32> Ops;
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bool Split = false;
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@ -4637,16 +4637,22 @@ static SDValue getConstVector(ArrayRef<APInt> Values, SmallBitVector &Undefs,
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}
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MVT EltVT = ConstVecVT.getVectorElementType();
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for (unsigned i = 0, e = Values.size(); i != e; ++i) {
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for (unsigned i = 0, e = Bits.size(); i != e; ++i) {
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if (Undefs[i]) {
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Ops.append(Split ? 2 : 1, DAG.getUNDEF(EltVT));
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continue;
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}
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const APInt &V = Values[i];
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const APInt &V = Bits[i];
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assert(V.getBitWidth() == VT.getScalarSizeInBits() && "Unexpected sizes");
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if (Split) {
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Ops.push_back(DAG.getConstant(V.trunc(32), dl, EltVT));
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Ops.push_back(DAG.getConstant(V.lshr(32).trunc(32), dl, EltVT));
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} else if (EltVT == MVT::f32) {
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APFloat FV(APFloat::IEEEsingle, V);
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Ops.push_back(DAG.getConstantFP(FV, dl, EltVT));
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} else if (EltVT == MVT::f64) {
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APFloat FV(APFloat::IEEEdouble, V);
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Ops.push_back(DAG.getConstantFP(FV, dl, EltVT));
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} else {
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Ops.push_back(DAG.getConstant(V, dl, EltVT));
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}
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@ -5037,6 +5043,77 @@ static const Constant *getTargetConstantFromNode(SDValue Op) {
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return dyn_cast<Constant>(CNode->getConstVal());
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}
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// Extract constant bits from constant pool vector.
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static bool getTargetConstantBitsFromNode(SDValue Op, unsigned EltSizeInBits,
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SmallBitVector &UndefElts,
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SmallVectorImpl<APInt> &EltBits) {
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assert(UndefElts.empty() && "Expected an empty UndefElts vector");
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assert(EltBits.empty() && "Expected an empty EltBits vector");
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EVT VT = Op.getValueType();
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unsigned SizeInBits = VT.getSizeInBits();
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assert((SizeInBits % EltSizeInBits) == 0 && "Can't split constant!");
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unsigned NumElts = SizeInBits / EltSizeInBits;
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auto *Cst = getTargetConstantFromNode(Op);
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if (!Cst)
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return false;
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Type *CstTy = Cst->getType();
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if (!CstTy->isVectorTy() || (SizeInBits != CstTy->getPrimitiveSizeInBits()))
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return false;
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// Extract all the undef/constant element data and pack into single bitsets.
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APInt UndefBits(SizeInBits, 0);
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APInt MaskBits(SizeInBits, 0);
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unsigned CstEltSizeInBits = CstTy->getScalarSizeInBits();
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for (unsigned i = 0, e = CstTy->getVectorNumElements(); i != e; ++i) {
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auto *COp = Cst->getAggregateElement(i);
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if (!COp ||
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!(isa<UndefValue>(COp) || isa<ConstantInt>(COp) ||
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isa<ConstantFP>(COp)))
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return false;
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if (isa<UndefValue>(COp)) {
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APInt EltUndef = APInt::getLowBitsSet(SizeInBits, CstEltSizeInBits);
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UndefBits |= EltUndef.shl(i * CstEltSizeInBits);
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continue;
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}
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APInt Bits;
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if (auto *CInt = dyn_cast<ConstantInt>(COp))
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Bits = CInt->getValue();
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else if (auto *CFP = dyn_cast<ConstantFP>(COp))
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Bits = CFP->getValueAPF().bitcastToAPInt();
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Bits = Bits.zextOrTrunc(SizeInBits);
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MaskBits |= Bits.shl(i * CstEltSizeInBits);
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}
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UndefElts = SmallBitVector(NumElts, false);
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EltBits.resize(NumElts, APInt(EltSizeInBits, 0));
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// Now extract the undef/constant bit data into the target elts.
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for (unsigned i = 0; i != NumElts; ++i) {
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APInt UndefEltBits = UndefBits.lshr(i * EltSizeInBits);
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UndefEltBits = UndefEltBits.zextOrTrunc(EltSizeInBits);
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// Only treat the element as UNDEF if all bits are UNDEF, otherwise
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// treat it as zero.
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if (UndefEltBits.isAllOnesValue()) {
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UndefElts[i] = true;
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continue;
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}
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APInt Bits = MaskBits.lshr(i * EltSizeInBits);
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Bits = Bits.zextOrTrunc(EltSizeInBits);
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EltBits[i] = Bits.getZExtValue();
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}
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return true;
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}
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static bool getTargetShuffleMaskIndices(SDValue MaskNode,
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unsigned MaskEltSizeInBits,
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SmallVectorImpl<uint64_t> &RawMask) {
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@ -26308,6 +26385,93 @@ static bool combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
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return false;
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}
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// Attempt to constant fold all of the constant source ops.
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// Returns true if the entire shuffle is folded to a constant.
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// TODO: Extend this to merge multiple constant Ops and update the mask.
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static bool combineX86ShufflesConstants(const SmallVectorImpl<SDValue> &Ops,
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ArrayRef<int> Mask, SDValue Root,
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bool HasVariableMask, SelectionDAG &DAG,
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TargetLowering::DAGCombinerInfo &DCI,
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const X86Subtarget &Subtarget) {
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MVT VT = Root.getSimpleValueType();
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unsigned SizeInBits = VT.getSizeInBits();
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unsigned NumMaskElts = Mask.size();
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unsigned MaskSizeInBits = SizeInBits / NumMaskElts;
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unsigned NumOps = Ops.size();
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// Extract constant bits from each source op.
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bool OneUseConstantOp = false;
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SmallVector<SmallBitVector, 4> UndefEltsOps(NumOps);
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SmallVector<SmallVector<APInt, 8>, 4> RawBitsOps(NumOps);
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for (unsigned i = 0; i != NumOps; ++i) {
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SDValue SrcOp = Ops[i];
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OneUseConstantOp |= SrcOp.hasOneUse();
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if (!getTargetConstantBitsFromNode(SrcOp, MaskSizeInBits, UndefEltsOps[i],
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RawBitsOps[i]))
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return false;
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}
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// Only fold if at least one of the constants is only used once or
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// the combined shuffle has included a variable mask shuffle, this
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// is to avoid constant pool bloat.
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if (!OneUseConstantOp && !HasVariableMask)
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return false;
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// Shuffle the constant bits according to the mask.
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SmallBitVector UndefElts(NumMaskElts, false);
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SmallBitVector ZeroElts(NumMaskElts, false);
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SmallBitVector ConstantElts(NumMaskElts, false);
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SmallVector<APInt, 8> ConstantBitData(NumMaskElts,
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APInt::getNullValue(MaskSizeInBits));
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for (unsigned i = 0; i != NumMaskElts; ++i) {
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int M = Mask[i];
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if (M == SM_SentinelUndef) {
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UndefElts[i] = true;
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continue;
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} else if (M == SM_SentinelZero) {
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ZeroElts[i] = true;
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continue;
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}
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assert(0 <= M && M < (int)(NumMaskElts * NumOps));
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unsigned SrcOpIdx = (unsigned)M / NumMaskElts;
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unsigned SrcMaskIdx = (unsigned)M % NumMaskElts;
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auto &SrcUndefElts = UndefEltsOps[SrcOpIdx];
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if (SrcUndefElts[SrcMaskIdx]) {
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UndefElts[i] = true;
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continue;
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}
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auto &SrcEltBits = RawBitsOps[SrcOpIdx];
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APInt &Bits = SrcEltBits[SrcMaskIdx];
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if (!Bits) {
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ZeroElts[i] = true;
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continue;
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}
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ConstantElts[i] = true;
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ConstantBitData[i] = Bits;
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}
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assert((UndefElts | ZeroElts | ConstantElts).count() == NumMaskElts);
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// Create the constant data.
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MVT MaskSVT;
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if (VT.isFloatingPoint() && (MaskSizeInBits == 32 || MaskSizeInBits == 64))
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MaskSVT = MVT::getFloatingPointVT(MaskSizeInBits);
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else
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MaskSVT = MVT::getIntegerVT(MaskSizeInBits);
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MVT MaskVT = MVT::getVectorVT(MaskSVT, NumMaskElts);
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SDLoc DL(Root);
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SDValue CstOp = getConstVector(ConstantBitData, UndefElts, MaskVT, DAG, DL);
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DCI.AddToWorklist(CstOp.getNode());
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DCI.CombineTo(Root.getNode(), DAG.getBitcast(VT, CstOp));
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return true;
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}
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/// \brief Fully generic combining of x86 shuffle instructions.
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///
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/// This should be the last combine run over the x86 shuffle instructions. Once
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@ -26491,6 +26655,11 @@ static bool combineX86ShufflesRecursively(ArrayRef<SDValue> SrcOps,
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HasVariableMask, DAG, DCI, Subtarget))
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return true;
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// Attempt to constant fold all of the constant source ops.
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if (combineX86ShufflesConstants(Ops, Mask, Root, HasVariableMask, DAG, DCI,
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Subtarget))
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return true;
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// We can only combine unary and binary shuffle mask cases.
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if (Ops.size() > 2)
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return false;
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@ -361,12 +361,12 @@ define <4 x float> @combine_vpermilvar_4f32_as_insertps(<4 x float> %a0) {
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define <2 x double> @constant_fold_vpermilvar_pd() {
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; X32-LABEL: constant_fold_vpermilvar_pd:
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; X32: # BB#0:
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; X32-NEXT: vpermilpd {{.*#+}} xmm0 = mem[1,0]
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; X32-NEXT: vmovaps {{.*#+}} xmm0 = [2.000000e+00,1.000000e+00]
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; X32-NEXT: retl
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;
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; X64-LABEL: constant_fold_vpermilvar_pd:
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; X64: # BB#0:
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; X64-NEXT: vpermilpd {{.*#+}} xmm0 = mem[1,0]
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; X64-NEXT: vmovaps {{.*#+}} xmm0 = [2.000000e+00,1.000000e+00]
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; X64-NEXT: retq
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%1 = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> <double 1.0, double 2.0>, <2 x i64> <i64 2, i64 0>)
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ret <2 x double> %1
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@ -375,12 +375,12 @@ define <2 x double> @constant_fold_vpermilvar_pd() {
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define <4 x double> @constant_fold_vpermilvar_pd_256() {
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; X32-LABEL: constant_fold_vpermilvar_pd_256:
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; X32: # BB#0:
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; X32-NEXT: vpermilpd {{.*#+}} ymm0 = mem[1,0,2,3]
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; X32-NEXT: vmovaps {{.*#+}} ymm0 = [2.000000e+00,1.000000e+00,3.000000e+00,4.000000e+00]
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; X32-NEXT: retl
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;
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; X64-LABEL: constant_fold_vpermilvar_pd_256:
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; X64: # BB#0:
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; X64-NEXT: vpermilpd {{.*#+}} ymm0 = mem[1,0,2,3]
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; X64-NEXT: vmovaps {{.*#+}} ymm0 = [2.000000e+00,1.000000e+00,3.000000e+00,4.000000e+00]
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; X64-NEXT: retq
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%1 = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> <double 1.0, double 2.0, double 3.0, double 4.0>, <4 x i64> <i64 2, i64 0, i64 0, i64 2>)
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ret <4 x double> %1
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@ -389,12 +389,12 @@ define <4 x double> @constant_fold_vpermilvar_pd_256() {
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define <4 x float> @constant_fold_vpermilvar_ps() {
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; X32-LABEL: constant_fold_vpermilvar_ps:
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; X32: # BB#0:
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; X32-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,0,2,1]
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; X32-NEXT: vmovaps {{.*#+}} xmm0 = [4.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00]
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; X32-NEXT: retl
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;
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; X64-LABEL: constant_fold_vpermilvar_ps:
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; X64: # BB#0:
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; X64-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,0,2,1]
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; X64-NEXT: vmovaps {{.*#+}} xmm0 = [4.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00]
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; X64-NEXT: retq
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%1 = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, <4 x i32> <i32 3, i32 0, i32 2, i32 1>)
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ret <4 x float> %1
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@ -403,14 +403,12 @@ define <4 x float> @constant_fold_vpermilvar_ps() {
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define <8 x float> @constant_fold_vpermilvar_ps_256() {
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; X32-LABEL: constant_fold_vpermilvar_ps_256:
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; X32: # BB#0:
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; X32-NEXT: vmovaps {{.*#+}} ymm0 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00,8.000000e+00]
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; X32-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,1,4,5,5,5]
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; X32-NEXT: vmovaps {{.*#+}} ymm0 = [1.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00,5.000000e+00,6.000000e+00,6.000000e+00,6.000000e+00]
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; X32-NEXT: retl
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;
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; X64-LABEL: constant_fold_vpermilvar_ps_256:
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; X64: # BB#0:
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; X64-NEXT: vmovaps {{.*#+}} ymm0 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00,8.000000e+00]
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; X64-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,1,4,5,5,5]
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; X64-NEXT: vmovaps {{.*#+}} ymm0 = [1.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00,5.000000e+00,6.000000e+00,6.000000e+00,6.000000e+00]
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; X64-NEXT: retq
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%1 = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x i32> <i32 4, i32 0, i32 2, i32 1, i32 0, i32 1, i32 1, i32 1>)
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ret <8 x float> %1
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@ -685,14 +685,12 @@ define <32 x i8> @combine_psrlq_pshufb(<4 x i64> %a0) {
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define <8 x i32> @constant_fold_permd() {
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; X32-LABEL: constant_fold_permd:
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; X32: # BB#0:
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; X32-NEXT: vmovdqa {{.*#+}} ymm0 = [4,6,2,1,7,1,5,0]
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; X32-NEXT: vpermd {{\.LCPI.*}}, %ymm0, %ymm0
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; X32-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1]
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; X32-NEXT: retl
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;
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; X64-LABEL: constant_fold_permd:
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; X64: # BB#0:
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; X64-NEXT: vmovdqa {{.*#+}} ymm0 = [4,6,2,1,7,1,5,0]
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; X64-NEXT: vpermd {{.*}}(%rip), %ymm0, %ymm0
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; X64-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1]
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; X64-NEXT: retq
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%1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>)
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ret <8 x i32> %1
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@ -701,14 +699,12 @@ define <8 x i32> @constant_fold_permd() {
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define <8 x float> @constant_fold_permps() {
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; X32-LABEL: constant_fold_permps:
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; X32: # BB#0:
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; X32-NEXT: vmovaps {{.*#+}} ymm0 = [4,6,2,1,7,1,5,0]
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; X32-NEXT: vpermps {{\.LCPI.*}}, %ymm0, %ymm0
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; X32-NEXT: vmovaps {{.*#+}} ymm0 = [5.000000e+00,7.000000e+00,3.000000e+00,2.000000e+00,8.000000e+00,2.000000e+00,6.000000e+00,1.000000e+00]
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; X32-NEXT: retl
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;
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; X64-LABEL: constant_fold_permps:
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; X64: # BB#0:
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; X64-NEXT: vmovaps {{.*#+}} ymm0 = [4,6,2,1,7,1,5,0]
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; X64-NEXT: vpermps {{.*}}(%rip), %ymm0, %ymm0
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; X64-NEXT: vmovaps {{.*#+}} ymm0 = [5.000000e+00,7.000000e+00,3.000000e+00,2.000000e+00,8.000000e+00,2.000000e+00,6.000000e+00,1.000000e+00]
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; X64-NEXT: retq
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%1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>)
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ret <8 x float> %1
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@ -717,14 +713,12 @@ define <8 x float> @constant_fold_permps() {
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define <32 x i8> @constant_fold_pshufb_256() {
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; X32-LABEL: constant_fold_pshufb_256:
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; X32: # BB#0:
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; X32-NEXT: vmovdqa {{.*#+}} ymm0 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,0,255,254,253,252,251,250,249,248,247,246,245,244,243,242,241]
|
||||
; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1],zero,zero,zero,ymm0[u,u],zero,zero,ymm0[15],zero,zero,zero,zero,zero,ymm0[7,6,17],zero,zero,zero,ymm0[u,u],zero,zero,ymm0[31],zero,zero,zero,zero,zero,ymm0[23,22]
|
||||
; X32-NEXT: vmovaps {{.*#+}} ymm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9,255,0,0,0,u,u,0,0,241,0,0,0,0,0,249,250>
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: constant_fold_pshufb_256:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: vmovdqa {{.*#+}} ymm0 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,0,255,254,253,252,251,250,249,248,247,246,245,244,243,242,241]
|
||||
; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1],zero,zero,zero,ymm0[u,u],zero,zero,ymm0[15],zero,zero,zero,zero,zero,ymm0[7,6,17],zero,zero,zero,ymm0[u,u],zero,zero,ymm0[31],zero,zero,zero,zero,zero,ymm0[23,22]
|
||||
; X64-NEXT: vmovaps {{.*#+}} ymm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9,255,0,0,0,u,u,0,0,241,0,0,0,0,0,249,250>
|
||||
; X64-NEXT: retq
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <32 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6, i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6>)
|
||||
ret <32 x i8> %1
|
||||
|
|
|
|||
|
|
@ -511,14 +511,12 @@ define <16 x i8> @combine_unpckl_arg1_pshufb(<16 x i8> %a0, <16 x i8> %a1) {
|
|||
define <16 x i8> @constant_fold_pshufb() {
|
||||
; SSE-LABEL: constant_fold_pshufb:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: movdqa {{.*#+}} xmm0 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
||||
; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1],zero,zero,zero,xmm0[u,u],zero,zero,xmm0[15],zero,zero,zero,zero,zero,xmm0[7,6]
|
||||
; SSE-NEXT: movaps {{.*#+}} xmm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9>
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: constant_fold_pshufb:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
||||
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1],zero,zero,zero,xmm0[u,u],zero,zero,xmm0[15],zero,zero,zero,zero,zero,xmm0[7,6]
|
||||
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9>
|
||||
; AVX-NEXT: retq
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <16 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6>)
|
||||
ret <16 x i8> %1
|
||||
|
|
|
|||
|
|
@ -261,14 +261,12 @@ define <4 x i32> @combine_vpperm_10zz32BA(<4 x i32> %a0, <4 x i32> %a1) {
|
|||
define <2 x double> @constant_fold_vpermil2pd() {
|
||||
; X32-LABEL: constant_fold_vpermil2pd:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: vmovapd {{.*#+}} xmm0 = [-2.000000e+00,-1.000000e+00]
|
||||
; X32-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1]
|
||||
; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-2.000000e+00,2.000000e+00]
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: constant_fold_vpermil2pd:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: vmovapd {{.*#+}} xmm0 = [-2.000000e+00,-1.000000e+00]
|
||||
; X64-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1]
|
||||
; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-2.000000e+00,2.000000e+00]
|
||||
; X64-NEXT: retq
|
||||
%1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> <double 1.0, double 2.0>, <2 x double> <double -2.0, double -1.0>, <2 x i64> <i64 4, i64 2>, i8 2)
|
||||
ret <2 x double> %1
|
||||
|
|
@ -277,16 +275,12 @@ define <2 x double> @constant_fold_vpermil2pd() {
|
|||
define <4 x double> @constant_fold_vpermil2pd_256() {
|
||||
; X32-LABEL: constant_fold_vpermil2pd_256:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: vmovapd {{.*#+}} ymm0 = [-4.000000e+00,-3.000000e+00,-2.000000e+00,-1.000000e+00]
|
||||
; X32-NEXT: vmovapd {{.*#+}} ymm1 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
|
||||
; X32-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0],zero,ymm1[3,2]
|
||||
; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-4.000000e+00,0.000000e+00,4.000000e+00,3.000000e+00]
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: constant_fold_vpermil2pd_256:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: vmovapd {{.*#+}} ymm0 = [-4.000000e+00,-3.000000e+00,-2.000000e+00,-1.000000e+00]
|
||||
; X64-NEXT: vmovapd {{.*#+}} ymm1 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
|
||||
; X64-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0],zero,ymm1[3,2]
|
||||
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-4.000000e+00,0.000000e+00,4.000000e+00,3.000000e+00]
|
||||
; X64-NEXT: retq
|
||||
%1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> <double 1.0, double 2.0, double 3.0, double 4.0>, <4 x double> <double -4.0, double -3.0, double -2.0, double -1.0>, <4 x i64> <i64 4, i64 8, i64 2, i64 0>, i8 2)
|
||||
ret <4 x double> %1
|
||||
|
|
@ -295,16 +289,12 @@ define <4 x double> @constant_fold_vpermil2pd_256() {
|
|||
define <4 x float> @constant_fold_vpermil2ps() {
|
||||
; X32-LABEL: constant_fold_vpermil2ps:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-4.000000e+00,-3.000000e+00,-2.000000e+00,-1.000000e+00]
|
||||
; X32-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
|
||||
; X32-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[0,2],zero
|
||||
; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-4.000000e+00,1.000000e+00,3.000000e+00,0.000000e+00]
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: constant_fold_vpermil2ps:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-4.000000e+00,-3.000000e+00,-2.000000e+00,-1.000000e+00]
|
||||
; X64-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
|
||||
; X64-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[0,2],zero
|
||||
; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-4.000000e+00,1.000000e+00,3.000000e+00,0.000000e+00]
|
||||
; X64-NEXT: retq
|
||||
%1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, <4 x float> <float -4.0, float -3.0, float -2.0, float -1.0>, <4 x i32> <i32 4, i32 0, i32 2, i32 8>, i8 2)
|
||||
ret <4 x float> %1
|
||||
|
|
@ -313,16 +303,12 @@ define <4 x float> @constant_fold_vpermil2ps() {
|
|||
define <8 x float> @constant_fold_vpermil2ps_256() {
|
||||
; X32-LABEL: constant_fold_vpermil2ps_256:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-8.000000e+00,-7.000000e+00,-6.000000e+00,-5.000000e+00,-4.000000e+00,-3.000000e+00,-2.000000e+00,-1.000000e+00]
|
||||
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00,8.000000e+00]
|
||||
; X32-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[0,2],zero,ymm1[4],zero,ymm1[4,6]
|
||||
; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-8.000000e+00,1.000000e+00,3.000000e+00,0.000000e+00,5.000000e+00,0.000000e+00,5.000000e+00,7.000000e+00]
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: constant_fold_vpermil2ps_256:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-8.000000e+00,-7.000000e+00,-6.000000e+00,-5.000000e+00,-4.000000e+00,-3.000000e+00,-2.000000e+00,-1.000000e+00]
|
||||
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00,8.000000e+00]
|
||||
; X64-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[0,2],zero,ymm1[4],zero,ymm1[4,6]
|
||||
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-8.000000e+00,1.000000e+00,3.000000e+00,0.000000e+00,5.000000e+00,0.000000e+00,5.000000e+00,7.000000e+00]
|
||||
; X64-NEXT: retq
|
||||
%1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x float> <float -8.0, float -7.0, float -6.0, float -5.0, float -4.0, float -3.0, float -2.0, float -1.0>, <8 x i32> <i32 4, i32 0, i32 2, i32 8, i32 0, i32 8, i32 0, i32 2>, i8 2)
|
||||
ret <8 x float> %1
|
||||
|
|
@ -331,16 +317,12 @@ define <8 x float> @constant_fold_vpermil2ps_256() {
|
|||
define <16 x i8> @constant_fold_vpperm() {
|
||||
; X32-LABEL: constant_fold_vpperm:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: vmovdqa {{.*#+}} xmm0 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
||||
; X32-NEXT: vmovdqa {{.*#+}} xmm1 = [0,255,254,253,252,251,250,249,248,247,246,245,244,243,242,241]
|
||||
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
||||
; X32-NEXT: vmovaps {{.*#+}} xmm0 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: constant_fold_vpperm:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: vmovdqa {{.*#+}} xmm0 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
||||
; X64-NEXT: vmovdqa {{.*#+}} xmm1 = [0,255,254,253,252,251,250,249,248,247,246,245,244,243,242,241]
|
||||
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
||||
; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
|
||||
; X64-NEXT: retq
|
||||
%1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> <i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <16 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16>)
|
||||
ret <16 x i8> %1
|
||||
|
|
|
|||
|
|
@ -42,10 +42,8 @@ define void @test1() {
|
|||
; X32-NEXT: xorps %xmm0, %xmm0
|
||||
; X32-NEXT: movlps %xmm0, (%esp)
|
||||
; X32-NEXT: movq (%esp), %mm0
|
||||
; X32-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
|
||||
; X32-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
|
||||
; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X32-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; X32-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movq {{[0-9]+}}(%esp), %mm1
|
||||
; X32-NEXT: xorl %edi, %edi
|
||||
; X32-NEXT: maskmovq %mm1, %mm0
|
||||
|
|
@ -58,10 +56,8 @@ define void @test1() {
|
|||
; X64-NEXT: xorps %xmm0, %xmm0
|
||||
; X64-NEXT: movlps %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
|
||||
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X64-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movq {{.*}}(%rip), %rax
|
||||
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %mm1
|
||||
; X64-NEXT: xorl %edi, %edi
|
||||
; X64-NEXT: maskmovq %mm1, %mm0
|
||||
|
|
|
|||
|
|
@ -18,13 +18,10 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
|
|||
define void @test(<4 x i16>* %a, <4 x i16>* %b) {
|
||||
; AVX-LABEL: test:
|
||||
; AVX: ## BB#0: ## %body
|
||||
; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [65533,124,125,14807]
|
||||
; AVX-NEXT: vpshufb %xmm0, %xmm1, %xmm1
|
||||
; AVX-NEXT: vmovq %xmm1, (%rdi)
|
||||
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [65535,0,0,65535]
|
||||
; AVX-NEXT: vpshufb %xmm0, %xmm1, %xmm0
|
||||
; AVX-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX-NEXT: movq {{.*}}(%rip), %rax
|
||||
; AVX-NEXT: movq %rax, (%rdi)
|
||||
; AVX-NEXT: movq {{.*}}(%rip), %rax
|
||||
; AVX-NEXT: movq %rax, (%rsi)
|
||||
; AVX-NEXT: retq
|
||||
body:
|
||||
%predphi = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i16> <i16 -3, i16 545, i16 4385, i16 14807>, <4 x i16> <i16 123, i16 124, i16 125, i16 127>
|
||||
|
|
|
|||
|
|
@ -372,15 +372,10 @@ define void @rot(%i8vec3pack* nocapture sret %result, %i8vec3pack* %X, %i8vec3pa
|
|||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-NEXT: movdqa {{.*#+}} xmm0 = <0,4,8,128,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; X86-NEXT: movdqa {{.*#+}} xmm1 = <158,158,158,u>
|
||||
; X86-NEXT: pshufb %xmm0, %xmm1
|
||||
; X86-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
||||
; X86-NEXT: pextrw $0, %xmm1, (%edx)
|
||||
; X86-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
|
||||
; X86-NEXT: pextrw $0, %xmm0, (%edx)
|
||||
; X86-NEXT: movb $-98, 2(%edx)
|
||||
; X86-NEXT: movdqa {{.*#+}} xmm1 = <1,1,1,u>
|
||||
; X86-NEXT: pshufb %xmm0, %xmm1
|
||||
; X86-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
||||
; X86-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
|
||||
; X86-NEXT: pextrw $0, %xmm0, (%ecx)
|
||||
; X86-NEXT: movb $1, 2(%ecx)
|
||||
; X86-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
|
||||
|
|
@ -396,15 +391,10 @@ define void @rot(%i8vec3pack* nocapture sret %result, %i8vec3pack* %X, %i8vec3pa
|
|||
;
|
||||
; X64-LABEL: rot:
|
||||
; X64: # BB#0: # %entry
|
||||
; X64-NEXT: movdqa {{.*#+}} xmm0 = <0,4,8,128,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; X64-NEXT: movdqa {{.*#+}} xmm1 = <158,158,158,u>
|
||||
; X64-NEXT: pshufb %xmm0, %xmm1
|
||||
; X64-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
||||
; X64-NEXT: pextrw $0, %xmm1, (%rsi)
|
||||
; X64-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
|
||||
; X64-NEXT: pextrw $0, %xmm0, (%rsi)
|
||||
; X64-NEXT: movb $-98, 2(%rsi)
|
||||
; X64-NEXT: movdqa {{.*#+}} xmm1 = <1,1,1,u>
|
||||
; X64-NEXT: pshufb %xmm0, %xmm1
|
||||
; X64-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
||||
; X64-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
|
||||
; X64-NEXT: pextrw $0, %xmm0, (%rdx)
|
||||
; X64-NEXT: movb $1, 2(%rdx)
|
||||
; X64-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
|
||||
|
|
|
|||
|
|
@ -111,16 +111,14 @@ define void @shuf5(<8 x i8>* %p) nounwind {
|
|||
; X86-LABEL: shuf5:
|
||||
; X86: # BB#0:
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movdqa {{.*#+}} xmm0 = [33,33,33,33,33,33,33,33]
|
||||
; X86-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; X86-NEXT: movq %xmm0, (%eax)
|
||||
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; X86-NEXT: movsd %xmm0, (%eax)
|
||||
; X86-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: shuf5:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: movdqa {{.*#+}} xmm0 = [33,33,33,33,33,33,33,33]
|
||||
; X64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; X64-NEXT: movq %xmm0, (%rdi)
|
||||
; X64-NEXT: movq {{.*}}(%rip), %rax
|
||||
; X64-NEXT: movq %rax, (%rdi)
|
||||
; X64-NEXT: retq
|
||||
%v = shufflevector <2 x i8> <i8 4, i8 33>, <2 x i8> undef, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
store <8 x i8> %v, <8 x i8>* %p, align 8
|
||||
|
|
|
|||
Loading…
Reference in New Issue