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[ARM] Select fp16 fabs 

This adds a pattern for the fabs intrinsic, the same as float and double.

Differential Revision: https://reviews.llvm.org/D62324

llvm-svn: 361715
This commit is contained in:
David Green 2019-05-26 10:51:58 +00:00
parent aeade651f3
commit 2881325b17
2 changed files with 13 additions and 9 deletions
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4
llvm/lib/Target/ARM/ARMInstrVFP.td
View File

@ -595,9 +595,9 @@ def VABSS : ASuIn<0b11101, 0b11, 0b0000, 0b11, 0,
}
def VABSH : AHuI<0b11101, 0b11, 0b0000, 0b11, 0,
(outs SPR:$Sd), (ins SPR:$Sm),
(outs HPR:$Sd), (ins HPR:$Sm),
IIC_fpUNA16, "vabs", ".f16\t$Sd, $Sm",
[]>;
[(set HPR:$Sd, (fabs (f16 HPR:$Sm)))]>;
let Defs = [FPSCR_NZCV] in {
def VCMPEZD : ADuI<0b11101, 0b11, 0b0101, 0b11, 0,

18
llvm/test/CodeGen/ARM/fp16-fullfp16.ll
View File

@ -312,13 +312,17 @@ define void @test_sqrt(half* %p) {
; ret void
;}
; FIXME
;define void @test_fabs(half* %p) {
; %a = load half, half* %p, align 2
; %r = call half @llvm.fabs.f16(half %a)
; store half %r, half* %p
; ret void
;}
define void @test_fabs(half* %p) {
; CHECK-LABEL: test_fabs:
; CHECK: vldr.16 s0, [r0]
; CHECK-NEXT: vabs.f16 s0, s0
; CHECK-NEXT: vstr.16 s0, [r0]
; CHECK-NEXT: bx lr
%a = load half, half* %p, align 2
%r = call half @llvm.fabs.f16(half %a)
store half %r, half* %p
ret void
}
define void @test_minnum(half* %p, half* %q) {
; CHECK-LABEL: test_minnum: