forked from OSchip/llvm-project
Add support for ARM / Thumb mode switching with .code 16 and .code 32.
llvm-svn: 134760
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d0f0600b49
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@ -42,7 +42,11 @@ class ARMOperand;
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class ARMAsmParser : public TargetAsmParser {
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MCAsmParser &Parser;
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OwningPtr<const MCSubtargetInfo> STI;
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/// STI, ARM_STI, Thumb_STI - Subtarget info for ARM and Thumb modes. STI
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/// points to either ARM_STI or Thumb_STI depending on the mode.
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const MCSubtargetInfo *STI;
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OwningPtr<const MCSubtargetInfo> ARM_STI;
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OwningPtr<const MCSubtargetInfo> Thumb_STI;
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MCAsmParser &getParser() const { return Parser; }
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MCAsmLexer &getLexer() const { return Parser.getLexer(); }
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@ -89,10 +93,13 @@ class ARMAsmParser : public TargetAsmParser {
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// FIXME: Can tablegen auto-generate this?
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return (STI->getFeatureBits() & ARM::ModeThumb) != 0;
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}
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bool isThumbOne() const {
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return isThumb() && (STI->getFeatureBits() & ARM::FeatureThumb2) == 0;
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}
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void SwitchMode() {
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STI = isThumb() ? ARM_STI.get() : Thumb_STI.get();
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setAvailableFeatures(ComputeAvailableFeatures(STI->getFeatureBits()));
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}
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/// @name Auto-generated Match Functions
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/// {
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@ -129,10 +136,24 @@ class ARMAsmParser : public TargetAsmParser {
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public:
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ARMAsmParser(StringRef TT, StringRef CPU, StringRef FS, MCAsmParser &_Parser)
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: TargetAsmParser(), Parser(_Parser),
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STI(ARM_MC::createARMMCSubtargetInfo(TT, CPU, FS)) {
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: TargetAsmParser(), Parser(_Parser) {
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MCAsmParserExtension::Initialize(_Parser);
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STI = ARM_MC::createARMMCSubtargetInfo(TT, CPU, FS);
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// FIXME: Design a better way to create two subtargets with only difference
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// being a feature change.
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if (isThumb()) {
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Thumb_STI.reset(STI);
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assert(TT.startswith("thumb") && "Unexpected Triple string for Thumb!");
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Twine ARM_TT = "arm" + TT.substr(5);
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ARM_STI.reset(ARM_MC::createARMMCSubtargetInfo(ARM_TT.str(), CPU, FS));
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} else {
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ARM_STI.reset(STI);
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assert(TT.startswith("arm") && "Unexpected Triple string for ARM!");
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Twine Thumb_TT = "thumb" + TT.substr(3);
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Thumb_STI.reset(ARM_MC::createARMMCSubtargetInfo(Thumb_TT.str(),CPU, FS));
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}
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// Initialize the set of available features.
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setAvailableFeatures(ComputeAvailableFeatures(STI->getFeatureBits()));
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}
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@ -2215,18 +2236,11 @@ bool ARMAsmParser::ParseDirectiveCode(SMLoc L) {
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return Error(Parser.getTok().getLoc(), "unexpected token in directive");
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Parser.Lex();
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// FIXME: We need to be able switch subtargets at this point so that
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// MatchInstructionImpl() will work when it gets the AvailableFeatures which
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// includes Feature_IsThumb or not to match the right instructions. This is
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// blocked on the FIXME in llvm-mc.cpp when creating the TargetMachine.
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if (Val == 16){
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assert(isThumb() &&
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"switching between arm/thumb not yet suppported via .code 16)");
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if (Val == 16) {
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if (!isThumb()) SwitchMode();
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getParser().getStreamer().EmitAssemblerFlag(MCAF_Code16);
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}
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else{
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assert(!isThumb() &&
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"switching between thumb/arm not yet suppported via .code 32)");
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} else {
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if (isThumb()) SwitchMode();
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getParser().getStreamer().EmitAssemblerFlag(MCAF_Code32);
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}
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@ -0,0 +1,16 @@
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@ Test ARM / Thumb mode switching with .code
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
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.code 16
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@ CHECK: add.w r0, r0, r1 @ encoding: [0x01,0x00,0x00,0xeb]
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add.w r0, r0, r1
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.code 32
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@ CHECK: add r0, r0, r1 @ encoding: [0x01,0x00,0x80,0xe0]
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add r0, r0, r1
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.code 16
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@ CHECK: add r0, r0, r1 @ encoding: [0x40,0x18]
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add r0, r0, r1
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