forked from OSchip/llvm-project
docs: Update the ShadowCallStack documentation.
- Remove most of the discussion of the x86_64 implementation; link to an older version of the documentation for details of that implementation. - Add description of the compatibility and security issues discovered during the development of the aarch64 implementation for Android. Differential Revision: https://reviews.llvm.org/D58105 llvm-svn: 353890
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@ -8,28 +8,45 @@ ShadowCallStack
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Introduction
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============
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ShadowCallStack is an **experimental** instrumentation pass, currently only
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implemented for x86_64 and aarch64, that protects programs against return
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address overwrites (e.g. stack buffer overflows.) It works by saving a
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function's return address to a separately allocated 'shadow call stack'
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in the function prolog and checking the return address on the stack against
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the shadow call stack in the function epilog.
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ShadowCallStack is an instrumentation pass, currently only implemented for
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aarch64 and x86_64, that protects programs against return address overwrites
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(e.g. stack buffer overflows.) It works by saving a function's return address
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to a separately allocated 'shadow call stack' in the function prolog in
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non-leaf functions and loading the return address from the shadow call stack
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in the function epilog. The return address is also stored on the regular stack
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for compatibility with unwinders, but is otherwise unused.
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The aarch64 implementation is considered production ready, and
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an `implementation of the runtime`_ has been added to Android's libc
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(bionic). The x86_64 implementation was evaluated using Chromium and was
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found to have critical performance and security deficiencies, and may be
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removed in a future release of the compiler. This document only describes
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the aarch64 implementation; details on the x86_64 implementation are found
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in the `Clang 7.0.1 documentation`_.
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.. _`implementation of the runtime`: https://android.googlesource.com/platform/bionic/+/808d176e7e0dd727c7f929622ec017f6e065c582/libc/bionic/pthread_create.cpp#128
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.. _`Clang 7.0.1 documentation`: https://releases.llvm.org/7.0.1/tools/clang/docs/ShadowCallStack.html
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Comparison
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----------
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To optimize for memory consumption and cache locality, the shadow call stack
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stores an index followed by an array of return addresses. This is in contrast
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to other schemes, like :doc:`SafeStack`, that mirror the entire stack and
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trade-off consuming more memory for shorter function prologs and epilogs with
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fewer memory accesses. Similarly, `Return Flow Guard`_ consumes more memory with
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shorter function prologs and epilogs than ShadowCallStack but suffers from the
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same race conditions (see `Security`_). Intel `Control-flow Enforcement Technology`_
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(CET) is a proposed hardware extension that would add native support to
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use a shadow stack to store/check return addresses at call/return time. It
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would not suffer from race conditions at calls and returns and not incur the
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overhead of function instrumentation, but it does require operating system
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support.
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To optimize for memory consumption and cache locality, the shadow call
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stack stores only an array of return addresses. This is in contrast to other
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schemes, like :doc:`SafeStack`, that mirror the entire stack and trade-off
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consuming more memory for shorter function prologs and epilogs with fewer
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memory accesses.
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`Return Flow Guard`_ is a pure software implementation of shadow call stacks
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on x86_64. It is similar to the ShadowCallStack x86_64 implementation but
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trades off higher memory usage for a shorter prologue and epilogue. Like
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x86_64 ShadowCallStack, it is inherently racy due to the architecture's use
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of the stack for calls and returns.
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Intel `Control-flow Enforcement Technology`_ (CET) is a proposed hardware
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extension that would add native support to use a shadow stack to store/check
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return addresses at call/return time. Being a hardware implementation, it
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would not suffer from race conditions and would not incur the overhead of
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function instrumentation, but it does require operating system support.
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.. _`Return Flow Guard`: https://xlab.tencent.com/en/2016/11/02/return-flow-guard/
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.. _`Control-flow Enforcement Technology`: https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
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@ -37,57 +54,96 @@ support.
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Compatibility
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-------------
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ShadowCallStack currently only supports x86_64 and aarch64. A runtime is not
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currently provided in compiler-rt so one must be provided by the compiled
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application.
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A runtime is not provided in compiler-rt so one must be provided by the
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compiled application or the operating system. Integrating the runtime into
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the operating system should be preferred since otherwise all thread creation
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and destruction would need to be intercepted by the application.
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On aarch64, the instrumentation makes use of the platform register ``x18``.
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On some platforms, ``x18`` is reserved, and on others, it is designated as
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a scratch register. This generally means that any code that may run on the
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same thread as code compiled with ShadowCallStack must either target one
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of the platforms whose ABI reserves ``x18`` (currently Darwin, Fuchsia and
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Windows) or be compiled with the flag ``-ffixed-x18``.
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The instrumentation makes use of the platform register ``x18``. On some
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platforms, ``x18`` is reserved, and on others, it is designated as a scratch
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register. This generally means that any code that may run on the same thread
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as code compiled with ShadowCallStack must either target one of the platforms
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whose ABI reserves ``x18`` (currently Android, Darwin, Fuchsia and Windows)
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or be compiled with the flag ``-ffixed-x18``. If absolutely necessary, code
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compiled without ``-ffixed-x18`` may be run on the same thread as code that
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uses ShadowCallStack by saving the register value temporarily on the stack
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(`example in Android`_) but this should be done with care since it risks
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leaking the shadow call stack address.
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.. _`example in Android`: https://android-review.googlesource.com/c/platform/frameworks/base/+/803717
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Because of the use of register ``x18``, the ShadowCallStack feature is
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incompatible with any other feature that may use ``x18``. However, there
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is no inherent reason why ShadowCallStack needs to use register ``x18``
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specifically; in principle, a platform could choose to reserve and use another
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register for ShadowCallStack, but this would be incompatible with the AAPCS64.
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Special unwind information is required on functions that are compiled
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with ShadowCallStack and that may be unwound, i.e. functions compiled with
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``-fexceptions`` (which is the default in C++). Some unwinders (such as the
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libgcc 4.9 unwinder) do not understand this unwind info and will segfault
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when encountering it. LLVM libunwind processes this unwind info correctly,
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however. This means that if exceptions are used together with ShadowCallStack,
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the program must use a compatible unwinder.
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Security
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========
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ShadowCallStack is intended to be a stronger alternative to
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``-fstack-protector``. It protects from non-linear overflows and arbitrary
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memory writes to the return address slot; however, similarly to
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``-fstack-protector`` this protection suffers from race conditions because of
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the call-return semantics on x86_64. There is a short race between the call
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instruction and the first instruction in the function that reads the return
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address where an attacker could overwrite the return address and bypass
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ShadowCallStack. Similarly, there is a time-of-check-to-time-of-use race in the
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function epilog where an attacker could overwrite the return address after it
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has been checked and before it has been returned to. Modifying the call-return
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semantics to fix this on x86_64 would incur an unacceptable performance overhead
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due to return branch prediction.
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memory writes to the return address slot.
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The instrumentation makes use of the ``gs`` segment register on x86_64,
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or the ``x18`` register on aarch64, to reference the shadow call stack
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meaning that references to the shadow call stack do not have to be stored in
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memory. This makes it possible to implement a runtime that avoids exposing
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the address of the shadow call stack to attackers that can read arbitrary
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memory. However, attackers could still try to exploit side channels exposed
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by the operating system `[1]`_ `[2]`_ or processor `[3]`_ to discover the
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address of the shadow call stack.
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The instrumentation makes use of the ``x18`` register to reference the shadow
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call stack, meaning that references to the shadow call stack do not have
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to be stored in memory. This makes it possible to implement a runtime that
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avoids exposing the address of the shadow call stack to attackers that can
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read arbitrary memory. However, attackers could still try to exploit side
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channels exposed by the operating system `[1]`_ `[2]`_ or processor `[3]`_
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to discover the address of the shadow call stack.
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.. _`[1]`: https://eyalitkin.wordpress.com/2017/09/01/cartography-lighting-up-the-shadows/
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.. _`[2]`: https://www.blackhat.com/docs/eu-16/materials/eu-16-Goktas-Bypassing-Clangs-SafeStack.pdf
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.. _`[3]`: https://www.vusec.net/projects/anc/
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On x86_64, leaf functions are optimized to store the return address in a
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free register and avoid writing to the shadow call stack if a register is
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available. Very short leaf functions are uninstrumented if their execution
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is judged to be shorter than the race condition window intrinsic to the
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instrumentation.
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Unless care is taken when allocating the shadow call stack, it may be
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possible for an attacker to guess its address using the addresses of
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other allocations. Therefore, the address should be chosen to make this
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difficult. One way to do this is to allocate a large guard region without
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read/write permissions, randomly select a small region within it to be
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used as the address of the shadow call stack and mark only that region as
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read/write. This also mitigates somewhat against processor side channels.
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The intent is that the Android runtime `will do this`_, but the platform will
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first need to be `changed`_ to avoid using ``setrlimit(RLIMIT_AS)`` to limit
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memory allocations in certain processes, as this also limits the number of
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guard regions that can be allocated.
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On aarch64, the architecture's call and return instructions (``bl`` and
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``ret``) operate on a register rather than the stack, which means that
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leaf functions are generally protected from return address overwrites even
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without ShadowCallStack. It also means that ShadowCallStack on aarch64 is not
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vulnerable to the same types of time-of-check-to-time-of-use races as x86_64.
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.. _`will do this`: https://android-review.googlesource.com/c/platform/bionic/+/891622
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.. _`changed`: https://android-review.googlesource.com/c/platform/frameworks/av/+/837745
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The runtime will need the address of the shadow call stack in order to
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deallocate it when destroying the thread. If the entire program is compiled
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with ``-ffixed-x18``, this is trivial: the address can be derived from the
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value stored in ``x18`` (e.g. by masking out the lower bits). If a guard
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region is used, the address of the start of the guard region could then be
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stored at the start of the shadow call stack itself. But if it is possible
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for code compiled without ``-ffixed-x18`` to run on a thread managed by the
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runtime, which is the case on Android for example, the address must be stored
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somewhere else instead. On Android we store the address of the start of the
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guard region in TLS and deallocate the entire guard region including the
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shadow call stack at thread exit. This is considered acceptable given that
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the address of the start of the guard region is already somewhat guessable.
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One way in which the address of the shadow call stack could leak is in the
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``jmp_buf`` data structure used by ``setjmp`` and ``longjmp``. The Android
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runtime `avoids this`_ by only storing the low bits of ``x18`` in the
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``jmp_buf``, which requires the address of the shadow call stack to be
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aligned to its size.
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.. _`avoids this`: https://android.googlesource.com/platform/bionic/+/808d176e7e0dd727c7f929622ec017f6e065c582/libc/arch-arm64/bionic/setjmp.S#49
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The architecture's call and return instructions (``bl`` and ``ret``) operate on
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a register rather than the stack, which means that leaf functions are generally
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protected from return address overwrites even without ShadowCallStack.
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Usage
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=====
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@ -132,17 +188,7 @@ The following example code:
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return bar() + 1;
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}
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Generates the following x86_64 assembly when compiled with ``-O2``:
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.. code-block:: gas
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push %rax
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callq bar
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add $0x1,%eax
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pop %rcx
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retq
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or the following aarch64 assembly:
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Generates the following aarch64 assembly when compiled with ``-O2``:
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.. code-block:: none
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ldp x29, x30, [sp], #16
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ret
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Adding ``-fsanitize=shadow-call-stack`` would output the following x86_64
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assembly:
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.. code-block:: gas
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mov (%rsp),%r10
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xor %r11,%r11
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addq $0x8,%gs:(%r11)
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mov %gs:(%r11),%r11
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mov %r10,%gs:(%r11)
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push %rax
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callq bar
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add $0x1,%eax
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pop %rcx
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xor %r11,%r11
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mov %gs:(%r11),%r10
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mov %gs:(%r10),%r10
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subq $0x8,%gs:(%r11)
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cmp %r10,(%rsp)
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jne trap
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retq
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trap:
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ud2
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or the following aarch64 assembly:
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Adding ``-fsanitize=shadow-call-stack`` would output the following assembly:
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.. code-block:: none
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