diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll index ab159c950660..c2d13c297106 100644 --- a/llvm/test/CodeGen/X86/bmi.ll +++ b/llvm/test/CodeGen/X86/bmi.ll @@ -1149,3 +1149,77 @@ define i64 @blsr64_branch(i64 %x) { } declare void @bar() + +define void @pr42118_i32(i32 %x) { +; X86-LABEL: pr42118_i32: +; X86: # %bb.0: +; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax +; X86-NEXT: jne .LBB48_1 +; X86-NEXT: # %bb.2: +; X86-NEXT: jmp bar # TAILCALL +; X86-NEXT: .LBB48_1: +; X86-NEXT: retl +; +; X64-LABEL: pr42118_i32: +; X64: # %bb.0: +; X64-NEXT: blsrl %edi, %eax +; X64-NEXT: jne .LBB48_1 +; X64-NEXT: # %bb.2: +; X64-NEXT: jmp bar # TAILCALL +; X64-NEXT: .LBB48_1: +; X64-NEXT: retq + %tmp = sub i32 0, %x + %tmp1 = and i32 %tmp, %x + %cmp = icmp eq i32 %tmp1, %x + br i1 %cmp, label %1, label %2 + + tail call void @bar() + br label %2 + + ret void +} + +define void @pr42118_i64(i64 %x) { +; X86-LABEL: pr42118_i64: +; X86: # %bb.0: +; X86-NEXT: pushl %esi +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: .cfi_offset %esi, -8 +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl %eax, %edx +; X86-NEXT: addl $-1, %edx +; X86-NEXT: movl %ecx, %esi +; X86-NEXT: adcl $-1, %esi +; X86-NEXT: andl %eax, %edx +; X86-NEXT: andl %ecx, %esi +; X86-NEXT: orl %edx, %esi +; X86-NEXT: jne .LBB49_1 +; X86-NEXT: # %bb.2: +; X86-NEXT: popl %esi +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: jmp bar # TAILCALL +; X86-NEXT: .LBB49_1: +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: popl %esi +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: retl +; +; X64-LABEL: pr42118_i64: +; X64: # %bb.0: +; X64-NEXT: blsrq %rdi, %rax +; X64-NEXT: jne .LBB49_1 +; X64-NEXT: # %bb.2: +; X64-NEXT: jmp bar # TAILCALL +; X64-NEXT: .LBB49_1: +; X64-NEXT: retq + %tmp = sub i64 0, %x + %tmp1 = and i64 %tmp, %x + %cmp = icmp eq i64 %tmp1, %x + br i1 %cmp, label %1, label %2 + + tail call void @bar() + br label %2 + + ret void +}