forked from OSchip/llvm-project
parent
00ada89f95
commit
2787efd961
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@ -719,7 +719,7 @@ multiclass sse12_fp_packed_int<bits<8> opc, string OpcodeStr, RegisterClass RC,
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/// six "instructions".
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///
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multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
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SDNode OpNode, bit Commutable = 0> {
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SDNode OpNode> {
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let isAsmParserOnly = 1 in {
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defm V#NAME#SS : sse12_fp_scalar<opc,
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@ -777,8 +777,8 @@ multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
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}
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// Arithmetic instructions
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defm ADD : basic_sse12_fp_binop_rm<0x58, "add", fadd, 1>;
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defm MUL : basic_sse12_fp_binop_rm<0x59, "mul", fmul, 1>;
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defm ADD : basic_sse12_fp_binop_rm<0x58, "add", fadd>;
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defm MUL : basic_sse12_fp_binop_rm<0x59, "mul", fmul>;
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let isCommutable = 0 in {
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defm SUB : basic_sse12_fp_binop_rm<0x5C, "sub", fsub>;
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@ -795,7 +795,7 @@ let isCommutable = 0 in {
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/// This provides a total of eight "instructions".
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///
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multiclass sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
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SDNode OpNode, bit Commutable = 0> {
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SDNode OpNode> {
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let isAsmParserOnly = 1 in {
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// Scalar operation, reg+reg.
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