forked from OSchip/llvm-project
Pass optLevel to XCoreDAGToDAGISel.
Patch by Kyriakos Georgiou. llvm-svn: 146656
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@ -24,7 +24,8 @@ namespace llvm {
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class XCoreTargetMachine;
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class formatted_raw_ostream;
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FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM);
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FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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} // end namespace llvm;
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@ -41,8 +41,8 @@ namespace {
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const XCoreSubtarget &Subtarget;
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public:
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XCoreDAGToDAGISel(XCoreTargetMachine &TM)
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: SelectionDAGISel(TM),
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XCoreDAGToDAGISel(XCoreTargetMachine &TM, CodeGenOpt::Level OptLevel)
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: SelectionDAGISel(TM, OptLevel),
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Lowering(*TM.getTargetLowering()),
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Subtarget(*TM.getSubtargetImpl()) { }
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@ -83,8 +83,9 @@ namespace {
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/// createXCoreISelDag - This pass converts a legalized DAG into a
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/// XCore-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *llvm::createXCoreISelDag(XCoreTargetMachine &TM) {
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return new XCoreDAGToDAGISel(TM);
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FunctionPass *llvm::createXCoreISelDag(XCoreTargetMachine &TM,
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CodeGenOpt::Level OptLevel) {
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return new XCoreDAGToDAGISel(TM, OptLevel);
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}
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bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Addr, SDValue &Base,
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@ -35,7 +35,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
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}
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bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM) {
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PM.add(createXCoreISelDag(*this));
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PM.add(createXCoreISelDag(*this, getOptLevel()));
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return false;
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}
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