forked from OSchip/llvm-project
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-pc-windows | FileCheck %s
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; We should be able to prodcue a single 128-bit load for these two 64-bit loads.
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; But we previously weren't because we weren't consistently looking through
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; WrapperRIP.
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@f = local_unnamed_addr global [4 x float] zeroinitializer, align 16
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@ms = common local_unnamed_addr global <4 x float> zeroinitializer, align 16
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define void @foo2() {
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; CHECK-LABEL: foo2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; CHECK-NEXT: movapd %xmm0, {{.*}}(%rip)
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; CHECK-NEXT: retq
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entry:
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%0 = load <2 x float>, <2 x float>* bitcast (float* getelementptr inbounds ([4 x float], [4 x float]* @f, i64 0, i64 2) to <2 x float>*), align 8
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%shuffle.i10 = shufflevector <2 x float> %0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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%1 = load <2 x float>, <2 x float>* bitcast ([4 x float]* @f to <2 x float>*), align 16
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%shuffle.i7 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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%shuffle.i = shufflevector <4 x float> %shuffle.i7, <4 x float> %shuffle.i10, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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store <4 x float> %shuffle.i, <4 x float>* @ms, align 16
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ret void
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}
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