forked from OSchip/llvm-project
Hoist spills when the same value is known to be in less loopy sibling registers.
Stack slot real estate is virtually free compared to registers, so it is advantageous to spill earlier even though the same value is now kept in both a register and a stack slot. Also eliminate redundant spills by extending the stack slot live range underneath reloaded registers. This can trigger a dead code elimination, removing copies and even reloads that were only feeding spills. llvm-svn: 127868
This commit is contained in:
Jakob Stoklund Olesen
parent
01fb4b018e
commit
27320cb864
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@ -83,7 +83,11 @@ class InlineSpiller : public Spiller {
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};
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// Values in RegsToSpill defined by sibling copies.
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DenseMap<VNInfo*, SibValueInfo> SibValues;
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typedef DenseMap<VNInfo*, SibValueInfo> SibValueMap;
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SibValueMap SibValues;
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// Dead defs generated during spilling.
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SmallVector<MachineInstr*, 8> DeadDefs;
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~InlineSpiller() {}
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@ -110,9 +114,18 @@ private:
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bool isSnippet(const LiveInterval &SnipLI);
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void collectRegsToSpill();
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bool isRegToSpill(unsigned Reg) {
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return std::find(RegsToSpill.begin(),
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RegsToSpill.end(), Reg) != RegsToSpill.end();
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}
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bool isSibling(unsigned Reg);
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void traceSiblingValue(unsigned, VNInfo*, VNInfo*);
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void analyzeSiblingValues();
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bool hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI);
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void eliminateRedundantSpills(unsigned Reg, VNInfo *VNI);
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bool reMaterializeFor(MachineBasicBlock::iterator MI);
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void reMaterializeAll();
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@ -225,18 +238,13 @@ void InlineSpiller::collectRegsToSpill() {
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for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Reg);
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MachineInstr *MI = RI.skipInstruction();) {
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unsigned SnipReg = isFullCopyOf(MI, Reg);
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if (!SnipReg)
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continue;
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if (!TargetRegisterInfo::isVirtualRegister(SnipReg))
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continue;
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if (VRM.getOriginal(SnipReg) != Original)
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if (!isSibling(SnipReg))
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continue;
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LiveInterval &SnipLI = LIS.getInterval(SnipReg);
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if (!isSnippet(SnipLI))
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continue;
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SnippetCopies.insert(MI);
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if (std::find(RegsToSpill.begin(), RegsToSpill.end(),
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SnipReg) == RegsToSpill.end())
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if (!isRegToSpill(SnipReg))
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RegsToSpill.push_back(SnipReg);
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DEBUG(dbgs() << "\talso spill snippet " << SnipLI << '\n');
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@ -256,6 +264,11 @@ void InlineSpiller::collectRegsToSpill() {
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// the value has already been spilled, or we may want to hoist the spill from a
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// loop.
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bool InlineSpiller::isSibling(unsigned Reg) {
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return TargetRegisterInfo::isVirtualRegister(Reg) &&
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VRM.getOriginal(Reg) == Original;
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}
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/// traceSiblingValue - Trace a value that is about to be spilled back to the
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/// real defining instructions by looking through sibling copies. Always stay
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/// within the range of OrigVNI so the registers are known to carry the same
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@ -271,14 +284,13 @@ void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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DEBUG(dbgs() << "Tracing value " << PrintReg(UseReg) << ':'
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<< UseVNI->id << '@' << UseVNI->def << '\n');
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SmallPtrSet<VNInfo*, 8> Visited;
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SmallVector<std::pair<unsigned,VNInfo*>, 8> WorkList;
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SmallVector<std::pair<unsigned, VNInfo*>, 8> WorkList;
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WorkList.push_back(std::make_pair(UseReg, UseVNI));
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// Best spill candidate seen so far. This must dominate UseVNI.
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SibValueInfo SVI(UseReg, UseVNI);
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MachineBasicBlock *UseMBB = LIS.getMBBFromIndex(UseVNI->def);
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MachineBasicBlock *SpillMBB = UseMBB;
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unsigned SpillDepth = Loops.getLoopDepth(SpillMBB);
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unsigned SpillDepth = Loops.getLoopDepth(UseMBB);
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bool SeenOrigPHI = false; // Original PHI met.
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do {
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@ -289,13 +301,9 @@ void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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continue;
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// Is this value a better spill candidate?
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if (VNI != SVI.SpillVNI) {
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if (!isRegToSpill(Reg)) {
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MachineBasicBlock *MBB = LIS.getMBBFromIndex(VNI->def);
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if (MBB == SpillMBB) {
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// Prefer to spill a previous value in the same block.
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if (VNI->def < SVI.SpillVNI->def)
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SVI.SpillReg = Reg, SVI.SpillVNI = VNI;
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} else if (MDT.dominates(MBB, UseMBB)) {
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if (MBB != UseMBB && MDT.dominates(MBB, UseMBB)) {
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// This is a valid spill location dominating UseVNI.
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// Prefer to spill at a smaller loop depth.
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unsigned Depth = Loops.getLoopDepth(MBB);
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@ -304,7 +312,6 @@ void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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<< ':' << VNI->id << '@' << VNI->def << '\n');
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SVI.SpillReg = Reg;
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SVI.SpillVNI = VNI;
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SpillMBB = MBB;
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SpillDepth = Depth;
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}
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}
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@ -335,8 +342,7 @@ void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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// Trace through sibling copies.
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if (unsigned SrcReg = isFullCopyOf(MI, Reg)) {
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if (TargetRegisterInfo::isVirtualRegister(SrcReg) &&
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VRM.getOriginal(SrcReg) == Original) {
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if (isSibling(SrcReg)) {
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LiveInterval &SrcLI = LIS.getInterval(SrcReg);
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VNInfo *SrcVNI = SrcLI.getVNInfoAt(VNI->def.getUseIndex());
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assert(SrcVNI && "Copy from non-existing value");
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@ -406,6 +412,108 @@ void InlineSpiller::analyzeSiblingValues() {
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}
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}
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/// hoistSpill - Given a sibling copy that defines a value to be spilled, insert
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/// a spill at a better location.
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bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI) {
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SlotIndex Idx = LIS.getInstructionIndex(CopyMI);
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VNInfo *VNI = SpillLI.getVNInfoAt(Idx.getDefIndex());
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assert(VNI && VNI->def == Idx.getDefIndex() && "Not defined by copy");
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SibValueMap::const_iterator I = SibValues.find(VNI);
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if (I == SibValues.end())
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return false;
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const SibValueInfo &SVI = I->second;
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// Let the normal folding code deal with the boring case.
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if (!SVI.AllDefsAreReloads && SVI.SpillVNI == VNI)
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return false;
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// Conservatively extend the stack slot range to the range of the original
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// value. We may be able to do better with stack slot coloring by being more
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// careful here.
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LiveInterval &StackInt = LSS.getInterval(StackSlot);
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LiveInterval &OrigLI = LIS.getInterval(Original);
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VNInfo *OrigVNI = OrigLI.getVNInfoAt(Idx);
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StackInt.MergeValueInAsValue(OrigLI, OrigVNI, StackInt.getValNumInfo(0));
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// Already spilled everywhere.
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if (SVI.AllDefsAreReloads)
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return true;
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// We are going to spill SVI.SpillVNI immediately after its def, so clear out
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// any later spills of the same value.
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eliminateRedundantSpills(SVI.SpillReg, SVI.SpillVNI);
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MachineBasicBlock *MBB = LIS.getMBBFromIndex(SVI.SpillVNI->def);
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MachineBasicBlock::iterator MII;
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if (SVI.SpillVNI->isPHIDef())
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MII = MBB->SkipPHIsAndLabels(MBB->begin());
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else {
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MII = LIS.getInstructionFromIndex(SVI.SpillVNI->def);
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++MII;
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}
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// Insert spill without kill flag immediately after def.
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TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot, RC, &TRI);
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--MII; // Point to store instruction.
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LIS.InsertMachineInstrInMaps(MII);
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VRM.addSpillSlotUse(StackSlot, MII);
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DEBUG(dbgs() << "\thoisted: " << SVI.SpillVNI->def << '\t' << *MII);
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return true;
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}
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/// eliminateRedundantSpills - Reg:VNI is known to be on the stack. Remove any
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/// redundant spills of this value in Reg and sibling copies.
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void InlineSpiller::eliminateRedundantSpills(unsigned Reg, VNInfo *VNI) {
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SmallVector<std::pair<unsigned, VNInfo*>, 8> WorkList;
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WorkList.push_back(std::make_pair(Reg, VNI));
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LiveInterval &StackInt = LSS.getInterval(StackSlot);
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do {
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tie(Reg, VNI) = WorkList.pop_back_val();
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DEBUG(dbgs() << "Checking redundant spills for " << PrintReg(Reg) << ':'
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<< VNI->id << '@' << VNI->def << '\n');
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// Regs to spill are taken care of.
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if (isRegToSpill(Reg))
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continue;
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// Add all of VNI's live range to StackInt.
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LiveInterval &LI = LIS.getInterval(Reg);
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StackInt.MergeValueInAsValue(LI, VNI, StackInt.getValNumInfo(0));
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// Find all spills and copies of VNI.
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for (MachineRegisterInfo::use_nodbg_iterator UI = MRI.use_nodbg_begin(Reg);
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MachineInstr *MI = UI.skipInstruction();) {
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if (!MI->isCopy() && !MI->getDesc().mayStore())
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continue;
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SlotIndex Idx = LIS.getInstructionIndex(MI);
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if (LI.getVNInfoAt(Idx) != VNI)
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continue;
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// Follow sibling copies down the dominator tree.
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if (unsigned DstReg = isFullCopyOf(MI, Reg)) {
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if (isSibling(DstReg)) {
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LiveInterval &DstLI = LIS.getInterval(DstReg);
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VNInfo *DstVNI = DstLI.getVNInfoAt(Idx.getDefIndex());
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assert(DstVNI && "Missing defined value");
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assert(DstVNI->def == Idx.getDefIndex() && "Wrong copy def slot");
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WorkList.push_back(std::make_pair(DstReg, DstVNI));
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}
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continue;
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}
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// Erase spills.
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int FI;
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if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) {
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DEBUG(dbgs() << "Redundant spill " << Idx << '\t' << *MI);
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// eliminateDeadDefs won't normally remove stores, so switch opcode.
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MI->setDesc(TII.get(TargetOpcode::KILL));
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DeadDefs.push_back(MI);
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}
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}
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} while (!WorkList.empty());
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}
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/// reMaterializeFor - Attempt to rematerialize before MI instead of reloading.
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bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
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SlotIndex UseIdx = LIS.getInstructionIndex(MI).getUseIndex();
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@ -679,6 +787,19 @@ void InlineSpiller::spillAroundUses(unsigned Reg) {
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SmallVector<unsigned, 8> Ops;
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tie(Reads, Writes) = MI->readsWritesVirtualRegister(Reg, &Ops);
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// Check for a sibling copy.
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unsigned SibReg = isFullCopyOf(MI, Reg);
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if (!isSibling(SibReg))
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SibReg = 0;
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// Hoist the spill of a sib-reg copy.
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if (SibReg && Writes && !Reads && hoistSpill(OldLI, MI)) {
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// This COPY is now dead, the value is already in the stack slot.
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MI->getOperand(0).setIsDead();
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DeadDefs.push_back(MI);
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continue;
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}
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// Attempt to fold memory ops.
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if (foldMemoryOperand(MI, Ops))
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continue;
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@ -728,11 +849,10 @@ void InlineSpiller::spill(LiveRangeEdit &edit) {
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<< LIS.getInterval(Original) << '\n');
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assert(edit.getParent().isSpillable() &&
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"Attempting to spill already spilled value.");
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assert(DeadDefs.empty() && "Previous spill didn't remove dead defs");
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collectRegsToSpill();
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analyzeSiblingValues();
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reMaterializeAll();
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// Remat may handle everything.
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@ -759,6 +879,12 @@ void InlineSpiller::spill(LiveRangeEdit &edit) {
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for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)
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spillAroundUses(RegsToSpill[i]);
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// Hoisted spills may cause dead code.
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if (!DeadDefs.empty()) {
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DEBUG(dbgs() << "Eliminating " << DeadDefs.size() << " dead defs\n");
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Edit->eliminateDeadDefs(DeadDefs, LIS, VRM, TII);
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}
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// Finally delete the SnippetCopies.
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for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(edit.getReg());
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MachineInstr *MI = RI.skipInstruction();) {
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