forked from OSchip/llvm-project
[ARM] Add AddrModeT2_i8neg addressing mode support for frame lowering.
As reported from a failing firefox build, we can sometimes get frame indices with negative offsets from a t2LDRi8. This adds support for them, to prevent the crash.
This commit is contained in:
David Green
parent
81eece7f26
commit
26f6fbe2be
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@ -530,6 +530,8 @@ getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const {
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unsigned ImmIdx = 0;
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switch (AddrMode) {
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case ARMII::AddrModeT2_i8:
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case ARMII::AddrModeT2_i8neg:
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case ARMII::AddrModeT2_i8pos:
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case ARMII::AddrModeT2_i12:
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case ARMII::AddrMode_i12:
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InstrOffs = MI->getOperand(Idx+1).getImm();
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@ -728,6 +730,8 @@ bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,
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bool isSigned = true;
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switch (AddrMode) {
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case ARMII::AddrModeT2_i8:
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case ARMII::AddrModeT2_i8pos:
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case ARMII::AddrModeT2_i8neg:
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case ARMII::AddrModeT2_i12:
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// i8 supports only negative, and i12 supports only positive, so
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// based on Offset sign, consider the appropriate instruction
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@ -0,0 +1,189 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -run-pass=prologepilog %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv7m-none-eabi"
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define i32 @testpos() {
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entry:
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%a = alloca i32, align 4
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call void @other(i32* %a)
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%b = load i32, i32* %a, align 4
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ret i32 %b
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}
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define i32 @testneg4() {
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entry:
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%a = alloca i32, align 4
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call void @other(i32* %a)
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%b = load i32, i32* %a, align 4
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ret i32 %b
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}
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define i32 @testneg8() {
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entry:
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%a = alloca i32, align 4
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call void @other(i32* %a)
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%b = load i32, i32* %a, align 4
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ret i32 %b
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}
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declare void @other(i32*)
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...
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---
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name: testpos
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tracksRegLiveness: true
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 4
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savePoint: ''
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restorePoint: ''
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stack:
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- { id: 0, name: a, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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local-offset: -4, debug-info-variable: '', debug-info-expression: '',
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debug-info-location: '' }
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: testpos
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; CHECK: liveins: $r7, $lr
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 2, 14 /* CC::al */, $noreg
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
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; CHECK-NEXT: renamable $r0 = t2ADDri $sp, 4, 14 /* CC::al */, $noreg, $noreg
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; CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @other, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp
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; CHECK-NEXT: renamable $r0 = t2LDRi12 $sp, 8, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.a)
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; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 2, 14 /* CC::al */, $noreg
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; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc, implicit $r0
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ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
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renamable $r0 = t2ADDri %stack.0.a, 0, 14 /* CC::al */, $noreg, $noreg
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tBL 14 /* CC::al */, $noreg, @other, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp
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ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
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renamable $r0 = t2LDRi12 %stack.0.a, 4, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.a)
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tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: testneg4
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tracksRegLiveness: true
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 4
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savePoint: ''
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restorePoint: ''
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stack:
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- { id: 0, name: a, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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local-offset: -4, debug-info-variable: '', debug-info-expression: '',
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debug-info-location: '' }
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: testneg4
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; CHECK: liveins: $r7, $lr
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 2, 14 /* CC::al */, $noreg
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
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; CHECK-NEXT: renamable $r0 = t2ADDri $sp, 4, 14 /* CC::al */, $noreg, $noreg
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; CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @other, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp
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; CHECK-NEXT: renamable $r0 = t2LDRi12 $sp, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.a)
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; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 2, 14 /* CC::al */, $noreg
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; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc, implicit $r0
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ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
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renamable $r0 = t2ADDri %stack.0.a, 0, 14 /* CC::al */, $noreg, $noreg
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tBL 14 /* CC::al */, $noreg, @other, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp
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ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
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renamable $r0 = t2LDRi8 %stack.0.a, -4, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.a)
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tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: testneg8
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tracksRegLiveness: true
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 4
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savePoint: ''
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restorePoint: ''
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stack:
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- { id: 0, name: a, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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local-offset: -4, debug-info-variable: '', debug-info-expression: '',
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debug-info-location: '' }
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: testneg8
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; CHECK: liveins: $r7, $lr
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 2, 14 /* CC::al */, $noreg
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
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; CHECK-NEXT: renamable $r0 = t2ADDri $sp, 4, 14 /* CC::al */, $noreg, $noreg
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; CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @other, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp
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; CHECK-NEXT: renamable $r0 = t2LDRi8 $sp, -4, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.a)
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; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 2, 14 /* CC::al */, $noreg
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; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc, implicit $r0
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ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
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renamable $r0 = t2ADDri %stack.0.a, 0, 14 /* CC::al */, $noreg, $noreg
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tBL 14 /* CC::al */, $noreg, @other, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp
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ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
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renamable $r0 = t2LDRi8 %stack.0.a, -8, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.a)
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tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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