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[Hexagon] Add patterns for shifts of v2i16 

This fixes https://llvm.org/PR39983.

llvm-svn: 349202
This commit is contained in:
Krzysztof Parzyszek 2018-12-14 22:33:48 +00:00
parent 07325c80d9
commit 26d994f56e
2 changed files with 28 additions and 0 deletions
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12
llvm/lib/Target/Hexagon/HexagonPatterns.td
View File

@ -1170,6 +1170,18 @@ def: Pat<(srl V4I16:$b, (v4i16 (HexagonVSPLAT u4_0ImmPred:$c))),
def: Pat<(shl V4I16:$b, (v4i16 (HexagonVSPLAT u4_0ImmPred:$c))),
(S2_asl_i_vh V4I16:$b, imm:$c)>;
def: Pat<(HexagonVASR V2I16:$Rs, u4_0ImmPred:$S),
(LoReg (S2_asr_i_vh (ToAext64 $Rs), imm:$S))>;
def: Pat<(HexagonVASL V2I16:$Rs, u4_0ImmPred:$S),
(LoReg (S2_asl_i_vh (ToAext64 $Rs), imm:$S))>;
def: Pat<(HexagonVLSR V2I16:$Rs, u4_0ImmPred:$S),
(LoReg (S2_lsr_i_vh (ToAext64 $Rs), imm:$S))>;
def: Pat<(HexagonVASR V2I16:$Rs, I32:$Rt),
(LoReg (S2_asr_i_vh (ToAext64 $Rs), I32:$Rt))>;
def: Pat<(HexagonVASL V2I16:$Rs, I32:$Rt),
(LoReg (S2_asl_i_vh (ToAext64 $Rs), I32:$Rt))>;
def: Pat<(HexagonVLSR V2I16:$Rs, I32:$Rt),
(LoReg (S2_lsr_i_vh (ToAext64 $Rs), I32:$Rt))>;
// --(9) Arithmetic/bitwise ----------------------------------------------
//

16
llvm/test/CodeGen/Hexagon/isel-vlsr-v2i16.ll Normal file
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@ -0,0 +1,16 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; This used to crash with "cannot select" error.
; CHECK: vlsrh(r1:0,#4)
target triple = "hexagon-unknown-linux-gnu"
define <2 x i16> @foo(<2 x i32>* nocapture %v) nounwind {
%vec = load <2 x i32>, <2 x i32>* %v, align 8
%trunc = trunc <2 x i32> %vec to <2 x i16>
%r = lshr <2 x i16> %trunc, <i16 4, i16 4>
ret <2 x i16> %r
}
attributes #0 = { nounwind "target-cpu"="hexagonv60" }