forked from OSchip/llvm-project
[ARM] Add missing M/R class CPUs
Add some of the missing M and R class Cortex CPUs, namely: Cortex-M0+ (called Cortex-M0plus for GCC compatibility) Cortex-M1 SC000 SC300 Cortex-R5 llvm-svn: 229660
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@ -325,6 +325,12 @@ def : Processor<"mpcore", ARMV6Itineraries, [HasV6Ops, FeatureVFP2,
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// V6M Processors.
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def : Processor<"cortex-m0", ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
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FeatureDB, FeatureMClass]>;
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def : Processor<"cortex-m0plus", ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
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FeatureDB, FeatureMClass]>;
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def : Processor<"cortex-m1", ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
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FeatureDB, FeatureMClass]>;
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def : Processor<"sc000", ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
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FeatureDB, FeatureMClass]>;
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// V6T2 Processors.
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def : Processor<"arm1156t2-s", ARMV6Itineraries, [HasV6T2Ops,
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@ -384,10 +390,20 @@ def : ProcessorModel<"cortex-r5", CortexA8Model,
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FeatureHasRAS, FeatureVFPOnlySP,
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FeatureD16, FeatureRClass]>;
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// FIXME: R7 has currently the same ProcessorModel as A8 and is modelled as R5.
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def : ProcessorModel<"cortex-r7", CortexA8Model,
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[ProcR5, HasV7Ops, FeatureDB,
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FeatureVFP3, FeatureDSPThumb2,
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FeatureHasRAS, FeatureVFPOnlySP,
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FeatureD16, FeatureMP, FeatureRClass]>;
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// V7M Processors.
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def : ProcNoItin<"cortex-m3", [HasV7Ops,
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FeatureThumb2, FeatureNoARM, FeatureDB,
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FeatureHWDiv, FeatureMClass]>;
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def : ProcNoItin<"sc300", [HasV7Ops,
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FeatureThumb2, FeatureNoARM, FeatureDB,
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FeatureHWDiv, FeatureMClass]>;
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// V7EM Processors.
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def : ProcNoItin<"cortex-m4", [HasV7Ops,
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@ -55,9 +55,21 @@
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 | FileCheck %s --check-prefix=SC000
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
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@ -72,6 +84,9 @@
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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@ -733,6 +748,102 @@
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; CORTEX-M0-FAST-NOT: .eabi_attribute 22
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; CORTEX-M0-FAST: .eabi_attribute 23, 1
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; CORTEX-M0PLUS: .cpu cortex-m0plus
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; CORTEX-M0PLUS: .eabi_attribute 6, 12
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; CORTEX-M0PLUS-NOT: .eabi_attribute 7
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; CORTEX-M0PLUS: .eabi_attribute 8, 0
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; CORTEX-M0PLUS: .eabi_attribute 9, 1
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; CORTEX-M0PLUS-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; CORTEX-M0PLUS: .eabi_attribute 20, 1
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; CORTEX-M0PLUS: .eabi_attribute 21, 1
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; CORTEX-M0PLUS-NOT: .eabi_attribute 22
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; CORTEX-M0PLUS: .eabi_attribute 23, 3
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; CORTEX-M0PLUS: .eabi_attribute 24, 1
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; CORTEX-M0PLUS: .eabi_attribute 25, 1
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; CORTEX-M0PLUS-NOT: .eabi_attribute 27
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; CORTEX-M0PLUS-NOT: .eabi_attribute 28
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; CORTEX-M0PLUS-NOT: .eabi_attribute 36
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; CORTEX-M0PLUS: .eabi_attribute 38, 1
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; CORTEX-M0PLUS-NOT: .eabi_attribute 42
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; CORTEX-M0PLUS-NOT: .eabi_attribute 44
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; CORTEX-M0PLUS-NOT: .eabi_attribute 68
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; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19
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;; Despite the M0+ CPU having no FPU in this scenario, we chose to
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;; flush to positive zero here. There's no hardware support doing
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;; this, but the fast maths software library might and such behaviour
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;; would match hardware support on this architecture revision if it
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;; existed.
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; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20
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; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21
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; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22
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; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1
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; CORTEX-M1: .cpu cortex-m1
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; CORTEX-M1: .eabi_attribute 6, 12
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; CORTEX-M1-NOT: .eabi_attribute 7
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; CORTEX-M1: .eabi_attribute 8, 0
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; CORTEX-M1: .eabi_attribute 9, 1
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; CORTEX-M1-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; CORTEX-M1: .eabi_attribute 20, 1
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; CORTEX-M1: .eabi_attribute 21, 1
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; CORTEX-M1-NOT: .eabi_attribute 22
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; CORTEX-M1: .eabi_attribute 23, 3
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; CORTEX-M1: .eabi_attribute 24, 1
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; CORTEX-M1: .eabi_attribute 25, 1
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; CORTEX-M1-NOT: .eabi_attribute 27
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; CORTEX-M1-NOT: .eabi_attribute 28
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; CORTEX-M1-NOT: .eabi_attribute 36
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; CORTEX-M1: .eabi_attribute 38, 1
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; CORTEX-M1-NOT: .eabi_attribute 42
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; CORTEX-M1-NOT: .eabi_attribute 44
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; CORTEX-M1-NOT: .eabi_attribute 68
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; CORTEX-M1-FAST-NOT: .eabi_attribute 19
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;; Despite the M1 CPU having no FPU in this scenario, we chose to
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;; flush to positive zero here. There's no hardware support doing
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;; this, but the fast maths software library might and such behaviour
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;; would match hardware support on this architecture revision if it
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;; existed.
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; CORTEX-M1-FAST-NOT: .eabi_attribute 20
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; CORTEX-M1-FAST-NOT: .eabi_attribute 21
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; CORTEX-M1-FAST-NOT: .eabi_attribute 22
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; CORTEX-M1-FAST: .eabi_attribute 23, 1
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; SC000: .cpu sc000
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; SC000: .eabi_attribute 6, 12
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; SC000-NOT: .eabi_attribute 7
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; SC000: .eabi_attribute 8, 0
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; SC000: .eabi_attribute 9, 1
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; SC000-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; SC000: .eabi_attribute 20, 1
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; SC000: .eabi_attribute 21, 1
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; SC000-NOT: .eabi_attribute 22
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; SC000: .eabi_attribute 23, 3
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; SC000: .eabi_attribute 24, 1
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; SC000: .eabi_attribute 25, 1
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; SC000-NOT: .eabi_attribute 27
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; SC000-NOT: .eabi_attribute 28
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; SC000-NOT: .eabi_attribute 36
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; SC000: .eabi_attribute 38, 1
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; SC000-NOT: .eabi_attribute 42
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; SC000-NOT: .eabi_attribute 44
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; SC000-NOT: .eabi_attribute 68
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; SC000-FAST-NOT: .eabi_attribute 19
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;; Despite the SC000 CPU having no FPU in this scenario, we chose to
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;; flush to positive zero here. There's no hardware support doing
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;; this, but the fast maths software library might and such behaviour
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;; would match hardware support on this architecture revision if it
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;; existed.
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; SC000-FAST-NOT: .eabi_attribute 20
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; SC000-FAST-NOT: .eabi_attribute 21
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; SC000-FAST-NOT: .eabi_attribute 22
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; SC000-FAST: .eabi_attribute 23, 1
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; CORTEX-M3: .cpu cortex-m3
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; CORTEX-M3: .eabi_attribute 6, 10
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; CORTEX-M3: .eabi_attribute 7, 77
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@ -763,6 +874,36 @@
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; CORTEX-M3-FAST-NOT: .eabi_attribute 22
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; CORTEX-M3-FAST: .eabi_attribute 23, 1
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; SC300: .cpu sc300
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; SC300: .eabi_attribute 6, 10
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; SC300: .eabi_attribute 7, 77
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; SC300: .eabi_attribute 8, 0
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; SC300: .eabi_attribute 9, 2
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; SC300-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; SC300: .eabi_attribute 20, 1
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; SC300: .eabi_attribute 21, 1
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; SC300-NOT: .eabi_attribute 22
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; SC300: .eabi_attribute 23, 3
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; SC300: .eabi_attribute 24, 1
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; SC300: .eabi_attribute 25, 1
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; SC300-NOT: .eabi_attribute 27
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; SC300-NOT: .eabi_attribute 28
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; SC300-NOT: .eabi_attribute 36
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; SC300: .eabi_attribute 38, 1
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; SC300-NOT: .eabi_attribute 42
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; SC300-NOT: .eabi_attribute 44
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; SC300-NOT: .eabi_attribute 68
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; SC300-FAST-NOT: .eabi_attribute 19
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;; Despite there being no FPU, we chose to flush to zero preserving
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;; sign. This matches what the hardware would do for this architecture
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;; revision.
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; SC300-FAST: .eabi_attribute 20, 2
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; SC300-FAST-NOT: .eabi_attribute 21
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; SC300-FAST-NOT: .eabi_attribute 22
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; SC300-FAST: .eabi_attribute 23, 1
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; CORTEX-M4-SOFT: .cpu cortex-m4
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; CORTEX-M4-SOFT: .eabi_attribute 6, 13
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; CORTEX-M4-SOFT: .eabi_attribute 7, 77
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@ -888,6 +1029,35 @@
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; CORTEX-R5-FAST-NOT: .eabi_attribute 22
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; CORTEX-R5-FAST: .eabi_attribute 23, 1
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; CORTEX-R7: .cpu cortex-r7
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; CORTEX-R7: .eabi_attribute 6, 10
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; CORTEX-R7: .eabi_attribute 7, 82
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; CORTEX-R7: .eabi_attribute 8, 1
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; CORTEX-R7: .eabi_attribute 9, 2
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; CORTEX-R7: .fpu vfpv3-d16
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; CORTEX-R7-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; CORTEX-R7: .eabi_attribute 20, 1
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; CORTEX-R7: .eabi_attribute 21, 1
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; CORTEX-R7-NOT: .eabi_attribute 22
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; CORTEX-R7: .eabi_attribute 23, 3
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; CORTEX-R7: .eabi_attribute 24, 1
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; CORTEX-R7: .eabi_attribute 25, 1
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; CORTEX-R7: .eabi_attribute 27, 1
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; CORTEX-R7-NOT: .eabi_attribute 28
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; CORTEX-R7-NOT: .eabi_attribute 36
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; CORTEX-R7: .eabi_attribute 38, 1
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; CORTEX-R7: .eabi_attribute 42, 1
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; CORTEX-R7: .eabi_attribute 44, 2
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; CORTEX-R7-NOT: .eabi_attribute 68
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; CORTEX-R7-FAST-NOT: .eabi_attribute 19
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;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
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; CORTEX-R7-FAST: .eabi_attribute 20, 2
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; CORTEX-R7-FAST-NOT: .eabi_attribute 21
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; CORTEX-R7-FAST-NOT: .eabi_attribute 22
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; CORTEX-R7-FAST: .eabi_attribute 23, 1
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; CORTEX-A53: .cpu cortex-a53
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; CORTEX-A53: .eabi_attribute 6, 14
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; CORTEX-A53: .eabi_attribute 7, 65
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