forked from OSchip/llvm-project
Fix a const violation in the generated disassembler.
llvm-svn: 161940
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parent
81a1ec8ea6
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26b568d9d5
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@ -905,7 +905,7 @@ emitDecoderFunction(formatted_raw_ostream &OS, DecoderSet &Decoders,
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OS.indent(Indentation) << "static DecodeStatus decodeToMCInst(DecodeStatus S,"
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OS.indent(Indentation) << "static DecodeStatus decodeToMCInst(DecodeStatus S,"
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<< " unsigned Idx, InsnType insn, MCInst &MI,\n";
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<< " unsigned Idx, InsnType insn, MCInst &MI,\n";
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OS.indent(Indentation) << " uint64_t "
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OS.indent(Indentation) << " uint64_t "
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<< "Address, void *Decoder) {\n";
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<< "Address, const void *Decoder) {\n";
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Indentation += 2;
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Indentation += 2;
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OS.indent(Indentation) << "InsnType tmp;\n";
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OS.indent(Indentation) << "InsnType tmp;\n";
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OS.indent(Indentation) << "switch (Idx) {\n";
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OS.indent(Indentation) << "switch (Idx) {\n";
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@ -1975,7 +1975,7 @@ static void emitDecodeInstruction(formatted_raw_ostream &OS) {
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<< " DEBUG(dbgs() << \"----- DECODE SUCCESSFUL -----\\n\");\n"
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<< " DEBUG(dbgs() << \"----- DECODE SUCCESSFUL -----\\n\");\n"
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<< "\n"
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<< "\n"
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<< " MI.setOpcode(Opc);\n"
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<< " MI.setOpcode(Opc);\n"
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<< " return decodeToMCInst(S, DecodeIdx, insn, MI, Address, (void*)DisAsm);\n"
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<< " return decodeToMCInst(S, DecodeIdx, insn, MI, Address, DisAsm);\n"
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<< " }\n"
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<< " }\n"
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<< " case MCD::OPC_SoftFail: {\n"
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<< " case MCD::OPC_SoftFail: {\n"
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<< " // Decode the mask values.\n"
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<< " // Decode the mask values.\n"
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