forked from OSchip/llvm-project
Change representation of member function pointers for MIPS targets
Differential Revision: http://reviews.llvm.org/D7148 llvm-svn: 229680
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805d807139
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@ -79,6 +79,12 @@ public:
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/// - guard variables are smaller.
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GenericAArch64,
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/// The generic Mips ABI is a modified version of the Itanium ABI.
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///
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/// At the moment, only change from the generic ABI in this case is:
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/// - representation of member function pointers adjusted as in ARM.
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GenericMIPS,
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/// The Microsoft ABI is the ABI used by Microsoft Visual Studio (and
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/// compatible compilers).
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///
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@ -114,6 +120,7 @@ public:
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case GenericARM:
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case iOS:
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case iOS64:
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case GenericMIPS:
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return true;
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case Microsoft:
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@ -130,6 +137,7 @@ public:
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case GenericARM:
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case iOS:
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case iOS64:
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case GenericMIPS:
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return false;
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case Microsoft:
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@ -212,6 +220,7 @@ public:
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case GenericItanium:
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case iOS: // old iOS compilers did not follow this rule
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case Microsoft:
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case GenericMIPS:
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return true;
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}
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llvm_unreachable("bad ABI kind");
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@ -257,6 +266,7 @@ public:
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case GenericAArch64:
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case GenericARM:
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case iOS:
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case GenericMIPS:
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return UseTailPaddingUnlessPOD03;
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// iOS on ARM64 uses the C++11 POD rules. It does not honor the
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@ -682,6 +682,7 @@ CXXABI *ASTContext::createCXXABI(const TargetInfo &T) {
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case TargetCXXABI::iOS:
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case TargetCXXABI::iOS64:
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case TargetCXXABI::GenericAArch64:
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case TargetCXXABI::GenericMIPS:
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case TargetCXXABI::GenericItanium:
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return CreateItaniumCXXABI(*this);
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case TargetCXXABI::Microsoft:
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@ -8079,6 +8080,7 @@ MangleContext *ASTContext::createMangleContext() {
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case TargetCXXABI::GenericAArch64:
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case TargetCXXABI::GenericItanium:
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case TargetCXXABI::GenericARM:
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case TargetCXXABI::GenericMIPS:
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case TargetCXXABI::iOS:
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case TargetCXXABI::iOS64:
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return ItaniumMangleContext::create(*this, getDiagnostics());
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@ -655,6 +655,7 @@ bool TargetCXXABI::tryParse(llvm::StringRef name) {
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.Case("ios", iOS)
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.Case("itanium", GenericItanium)
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.Case("microsoft", Microsoft)
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.Case("arm", GenericMIPS)
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.Default(unknown);
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if (kind == unknown) return false;
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@ -5663,7 +5663,9 @@ public:
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const std::string &CPUStr)
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: TargetInfo(Triple), CPU(CPUStr), IsMips16(false), IsMicromips(false),
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IsNan2008(false), IsSingleFloat(false), FloatABI(HardFloat),
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DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) {}
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DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) {
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TheCXXABI.set(TargetCXXABI::GenericMIPS);
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}
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bool isNaN2008Default() const {
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return CPU == "mips32r6" || CPU == "mips64r6";
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@ -64,6 +64,7 @@ static CGCXXABI *createCXXABI(CodeGenModule &CGM) {
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case TargetCXXABI::GenericARM:
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case TargetCXXABI::iOS:
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case TargetCXXABI::iOS64:
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case TargetCXXABI::GenericMIPS:
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case TargetCXXABI::GenericItanium:
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return CreateItaniumCXXABI(CGM);
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case TargetCXXABI::Microsoft:
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@ -339,6 +339,9 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
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return new ItaniumCXXABI(CGM, /* UseARMMethodPtrABI = */ true,
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/* UseARMGuardVarABI = */ true);
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case TargetCXXABI::GenericMIPS:
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return new ItaniumCXXABI(CGM, /* UseARMMethodPtrABI = */ true);
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case TargetCXXABI::GenericItanium:
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if (CGM.getContext().getTargetInfo().getTriple().getArch()
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== llvm::Triple::le32) {
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@ -6,6 +6,8 @@
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// PNaCl uses the same representation of method pointers as ARM.
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// RUN: %clang_cc1 %s -emit-llvm -o - -triple=le32-unknown-nacl | FileCheck -check-prefix GLOBAL-ARM %s
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// MIPS uses the same representation of method pointers as ARM.
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// RUN: %clang_cc1 %s -emit-llvm -o - -triple=mips-unknown-linux-gnu | FileCheck -check-prefix GLOBAL-ARM %s
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struct A { int a; void f(); virtual void vf1(); virtual void vf2(); };
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struct B { int b; virtual void g(); };
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