forked from OSchip/llvm-project
[RISCV] Add new V instructions in v1.0-08a0b46.
Add new V instructions. vfrsqrte7.v vfrece7.v vrgatherei16.vv vneg.v vncvt.x.x.w vfneg.v
This commit is contained in:
Hsiangkai Wang
parent
aba24c1580
commit
266820be35
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@ -512,6 +512,8 @@ defm VADD_V : VALU_IV_V_X_I<"vadd", 0b000000>;
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defm VSUB_V : VALU_IV_V_X<"vsub", 0b000010>;
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defm VRSUB_V : VALU_IV_X_I<"vrsub", 0b000011>;
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def : InstAlias<"vneg.v $vd, $vs$vm", (VRSUB_VX VR:$vd, VR:$vs, X0, VMaskOp:$vm)>;
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// Vector Widening Integer Add/Subtract
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// Refer to 11.2 Widening Vector Arithmetic Instructions
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// The destination vector register group cannot overlap a source vector
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@ -584,6 +586,9 @@ defm VNSRL_W : VALU_IV_V_X_I<"vnsrl", 0b101100, uimm5, "w">;
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defm VNSRA_W : VALU_IV_V_X_I<"vnsra", 0b101101, uimm5, "w">;
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} // Constraints = "@earlyclobber $vd", RVVConstraint = Narrow
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def : InstAlias<"vncvt.x.x.w $vd, $vs$vm",
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(VNSRL_WX VR:$vd, VR:$vs, X0, VMaskOp:$vm)>;
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// Vector Integer Comparison Instructions
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let RVVConstraint = NoConstraint in {
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defm VMSEQ_V : VALU_IV_V_X_I<"vmseq", 0b011000>;
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@ -784,6 +789,8 @@ defm VFWNMSAC_V : VALUr_FV_V_F<"vfwnmsac", 0b111111>;
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// Vector Floating-Point Square-Root Instruction
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defm VFSQRT_V : VALU_FV_VS2<"vfsqrt.v", 0b010011, 0b00000>;
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defm VFRSQRTE7_V : VALU_FV_VS2<"vfrsqrte7.v", 0b010011, 0b00100>;
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defm VFRECE7_V : VALU_FV_VS2<"vfrece7.v", 0b010011, 0b00101>;
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// Vector Floating-Point MIN/MAX Instructions
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defm VFMIN_V : VALU_FV_V_F<"vfmin", 0b000100>;
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@ -794,6 +801,9 @@ defm VFSGNJ_V : VALU_FV_V_F<"vfsgnj", 0b001000>;
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defm VFSGNJN_V : VALU_FV_V_F<"vfsgnjn", 0b001001>;
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defm VFSGNJX_V : VALU_FV_V_F<"vfsgnjx", 0b001010>;
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def : InstAlias<"vfneg.v $vd, $vs$vm",
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(VFSGNJN_VV VR:$vd, VR:$vs, VR:$vs, VMaskOp:$vm)>;
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// Vector Floating-Point Compare Instructions
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let RVVConstraint = NoConstraint in {
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defm VMFEQ_V : VALU_FV_V_F<"vmfeq", 0b011000>;
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@ -1010,6 +1020,7 @@ let Predicates = [HasStdExtV] in {
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// Vector Register Gather Instruction
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let Constraints = "@earlyclobber $vd", RVVConstraint = Vrgather in {
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defm VRGATHER_V : VALU_IV_V_X_I<"vrgather", 0b001100, uimm5>;
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def VRGATHEREI16_VV : VALUVV<0b001110, OPIVV, "vrgatherei16.vv">;
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} // Constraints = "@earlyclobber $vd", RVVConstraint = Vrgather
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// Vector Compress Instruction
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@ -0,0 +1,65 @@
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# RUN: llvm-mc --triple=riscv64 -mattr +experimental-v < %s --show-encoding 2>&1 \
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# RUN: -mattr +d | FileCheck --check-prefix=ALIAS %s
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# RUN: llvm-mc --triple=riscv64 -mattr=+experimental-v --riscv-no-aliases < %s \
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# RUN: -mattr +d --show-encoding 2>&1 | FileCheck --check-prefix=NO-ALIAS %s
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# ALIAS: vwcvt.x.x.v v2, v1, v0.t # encoding: [0x57,0x61,0x10,0xc4]
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# NO-ALIAS: vwadd.vx v2, v1, zero, v0.t # encoding: [0x57,0x61,0x10,0xc4]
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vwcvt.x.x.v v2, v1, v0.t
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# ALIAS: vwcvtu.x.x.v v2, v1, v0.t # encoding: [0x57,0x61,0x10,0xc0]
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# NO-ALIAS: vwaddu.vx v2, v1, zero, v0.t # encoding: [0x57,0x61,0x10,0xc0]
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vwcvtu.x.x.v v2, v1, v0.t
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# ALIAS: vnot.v v2, v2, v0.t # encoding: [0x57,0xb1,0x2f,0x2c]
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# NO-ALIAS: vxor.vi v2, v2, -1, v0.t # encoding: [0x57,0xb1,0x2f,0x2c]
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vnot.v v2, v2, v0.t
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# ALIAS: vmsltu.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x68]
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# NO-ALIAS: vmsltu.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x68]
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vmsgtu.vv v2, v2, v1, v0.t
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# ALIAS: vmslt.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x6c]
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# NO-ALIAS: vmslt.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x6c]
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vmsgt.vv v2, v2, v1, v0.t
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# ALIAS: vmsleu.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x70]
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# NO-ALIAS: vmsleu.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x70]
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vmsgeu.vv v2, v2, v1, v0.t
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# ALIAS: vmsle.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x74]
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# NO-ALIAS: vmsle.vv v2, v1, v2, v0.t # encoding: [0x57,0x01,0x11,0x74]
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vmsge.vv v2, v2, v1, v0.t
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# ALIAS: vmsleu.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x70]
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# NO-ALIAS: vmsleu.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x70]
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vmsltu.vi v2, v2, 16, v0.t
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# ALIAS: vmsle.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x74]
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# NO-ALIAS: vmsle.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x74]
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vmslt.vi v2, v2, 16, v0.t
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# ALIAS: vmsgtu.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x78]
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# NO-ALIAS: vmsgtu.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x78]
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vmsgeu.vi v2, v2, 16, v0.t
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# ALIAS: vmsgt.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x7c]
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# NO-ALIAS: vmsgt.vi v2, v2, 15, v0.t # encoding: [0x57,0xb1,0x27,0x7c]
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vmsge.vi v2, v2, 16, v0.t
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# ALIAS: vmflt.vv v2, v1, v2, v0.t # encoding: [0x57,0x11,0x11,0x6c]
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# NO-ALIAS: vmflt.vv v2, v1, v2, v0.t # encoding: [0x57,0x11,0x11,0x6c]
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vmfgt.vv v2, v2, v1, v0.t
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# ALIAS: vmfle.vv v2, v1, v2, v0.t # encoding: [0x57,0x11,0x11,0x64]
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# NO-ALIAS: vmfle.vv v2, v1, v2, v0.t # encoding: [0x57,0x11,0x11,0x64]
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vmfge.vv v2, v2, v1, v0.t
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# ALIAS: vmmv.m v0, v1 # encoding: [0x57,0xa0,0x10,0x66]
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# NO-ALIAS: vmand.mm v0, v1, v1 # encoding: [0x57,0xa0,0x10,0x66]
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vmmv.m v0, v1
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# ALIAS: vmclr.m v0 # encoding: [0x57,0x20,0x00,0x6e]
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# NO-ALIAS: vmxor.mm v0, v0, v0 # encoding: [0x57,0x20,0x00,0x6e]
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vmclr.m v0
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# ALIAS: vmset.m v0 # encoding: [0x57,0x20,0x00,0x7e]
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# NO-ALIAS: vmxnor.mm v0, v0, v0 # encoding: [0x57,0x20,0x00,0x7e]
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vmset.m v0
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# ALIAS: vmnot.m v0, v1 # encoding: [0x57,0xa0,0x10,0x76]
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# NO-ALIAS: vmnand.mm v0, v1, v1 # encoding: [0x57,0xa0,0x10,0x76]
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vmnot.m v0, v1
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# ALIAS: vneg.v v2, v1, v0.t # encoding: [0x57,0x41,0x10,0x0c]
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# NO-ALIAS: vrsub.vx v2, v1, zero, v0.t # encoding: [0x57,0x41,0x10,0x0c]
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vneg.v v2, v1, v0.t
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# ALIAS: vncvt.x.x.w v2, v1, v0.t # encoding: [0x57,0x41,0x10,0xb0]
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# NO-ALIAS: vnsrl.wx v2, v1, zero, v0.t # encoding: [0x57,0x41,0x10,0xb0]
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vncvt.x.x.w v2, v1, v0.t
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# ALIAS: vfneg.v v2, v1, v0.t # encoding: [0x57,0x91,0x10,0x24]
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# NO-ALIAS: vfsgnjn.vv v2, v1, v1, v0.t # encoding: [0x57,0x91,0x10,0x24]
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vfneg.v v2, v1, v0.t
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@ -1,15 +1,14 @@
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# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-v %s \
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# RUN: --mattr=+f \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: --mattr=+f --riscv-no-aliases \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
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# RUN: --mattr=+f \
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# RUN: | llvm-objdump -d --mattr=+experimental-v --mattr=+f - \
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# RUN: | FileCheck %s --check-prefix=CHECK-INST
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# RUN: --mattr=+f | llvm-objdump -d --mattr=+experimental-v \
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# RUN: --mattr=+f --riscv-no-aliases - \
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# RUN: | FileCheck %s --check-prefix=CHECK-INST
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# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
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# RUN: --mattr=+f \
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# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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# RUN: --mattr=+f | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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vfsqrt.v v8, v4, v0.t
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# CHECK-INST: vfsqrt.v v8, v4, v0.t
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@ -23,6 +22,30 @@ vfsqrt.v v8, v4
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# CHECK-ERROR: instruction requires the following: 'F'{{.*}}'V'
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# CHECK-UNKNOWN: 57 14 40 4e <unknown>
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vfrsqrte7.v v8, v4, v0.t
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# CHECK-INST: vfrsqrte7.v v8, v4, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x42,0x4c]
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# CHECK-ERROR: instruction requires the following: 'F'{{.*}}'V'
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# CHECK-UNKNOWN: 57 14 42 4c <unknown>
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vfrsqrte7.v v8, v4
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# CHECK-INST: vfrsqrte7.v v8, v4
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# CHECK-ENCODING: [0x57,0x14,0x42,0x4e]
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# CHECK-ERROR: instruction requires the following: 'F'{{.*}}'V'
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# CHECK-UNKNOWN: 57 14 42 4e <unknown>
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vfrece7.v v8, v4, v0.t
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# CHECK-INST: vfrece7.v v8, v4, v0.t
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# CHECK-ENCODING: [0x57,0x94,0x42,0x4c]
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# CHECK-ERROR: instruction requires the following: 'F'{{.*}}'V'
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# CHECK-UNKNOWN: 57 94 42 4c <unknown>
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vfrece7.v v8, v4
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# CHECK-INST: vfrece7.v v8, v4
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# CHECK-ENCODING: [0x57,0x94,0x42,0x4e]
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# CHECK-ERROR: instruction requires the following: 'F'{{.*}}'V'
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# CHECK-UNKNOWN: 57 94 42 4e <unknown>
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vfclass.v v8, v4, v0.t
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# CHECK-INST: vfclass.v v8, v4, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x48,0x4c]
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@ -1,12 +1,12 @@
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# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-v %s \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: --riscv-no-aliases | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
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# RUN: | llvm-objdump -d --mattr=+experimental-v - \
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# RUN: | FileCheck %s --check-prefix=CHECK-INST
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# RUN: | llvm-objdump -d --mattr=+experimental-v - --riscv-no-aliases \
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# RUN: | FileCheck %s --check-prefix=CHECK-INST
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# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
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# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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vmerge.vvm v8, v4, v20, v0
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# CHECK-INST: vmerge.vvm v8, v4, v20, v0
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@ -134,6 +134,18 @@ vrgather.vi v8, v4, 31
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# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
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# CHECK-UNKNOWN: 57 b4 4f 32 <unknown>
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vrgatherei16.vv v8, v4, v20, v0.t
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# CHECK-INST: vrgatherei16.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x04,0x4a,0x38]
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# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
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# CHECK-UNKNOWN: 57 04 4a 38 <unknown>
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vrgatherei16.vv v8, v4, v20
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# CHECK-INST: vrgatherei16.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x04,0x4a,0x3a]
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# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
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# CHECK-UNKNOWN: 57 04 4a 3a <unknown>
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vcompress.vm v8, v4, v20
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# CHECK-INST: vcompress.vm v8, v4, v20
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# CHECK-ENCODING: [0x57,0x24,0x4a,0x5e]
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