forked from OSchip/llvm-project
[AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC.
llvm-svn: 346533
This commit is contained in:
parent
ac8fed68d5
commit
26299e2af1
|
@ -1,29 +1,21 @@
|
|||
# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-optimize-exec-masking -o - %s | FileCheck %s
|
||||
|
||||
--- |
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
%id = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%cc = icmp eq i32 %id, 0
|
||||
%0 = call { i1, i64 } @llvm.amdgcn.if(i1 %cc)
|
||||
%1 = extractvalue { i1, i64 } %0, 0
|
||||
%2 = extractvalue { i1, i64 } %0, 1
|
||||
br i1 %1, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if: ; preds = %main_body
|
||||
%v.if = load volatile i32, i32 addrspace(1)* undef
|
||||
br label %end
|
||||
|
||||
end: ; preds = %if, %main_body
|
||||
%r = phi i32 [ 4, %main_body ], [ %v.if, %if ]
|
||||
call void @llvm.amdgcn.end.cf(i64 %2)
|
||||
store i32 %r, i32 addrspace(1)* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -32,9 +24,9 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_or_saveexec(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_or_saveexec(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -43,31 +35,20 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_valu_middle(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_valu_middle(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
%id = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%cc = icmp eq i32 %id, 0
|
||||
%0 = call { i1, i64 } @llvm.amdgcn.if(i1 %cc)
|
||||
%1 = extractvalue { i1, i64 } %0, 0
|
||||
%2 = extractvalue { i1, i64 } %0, 1
|
||||
store i32 %id, i32 addrspace(1)* undef
|
||||
br i1 %1, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if: ; preds = %main_body
|
||||
%v.if = load volatile i32, i32 addrspace(1)* undef
|
||||
br label %end
|
||||
|
||||
end: ; preds = %if, %main_body
|
||||
%r = phi i32 [ 4, %main_body ], [ %v.if, %if ]
|
||||
call void @llvm.amdgcn.end.cf(i64 %2)
|
||||
store i32 %r, i32 addrspace(1)* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_wrong_reg(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_wrong_reg(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -76,9 +57,9 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_modify_copy_to_exec(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_modify_copy_to_exec(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -87,9 +68,9 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_live_out_setexec(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_and_saveexec_xor_live_out_setexec(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -98,9 +79,9 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_unknown_saveexec(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_unknown_saveexec(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -109,9 +90,9 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_andn2_saveexec(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_andn2_saveexec(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -120,9 +101,9 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @optimize_if_andn2_saveexec_no_commute(i32 %z, i32 %v) #0 {
|
||||
define amdgpu_kernel void @optimize_if_andn2_saveexec_no_commute(i32 %z, i32 %v) {
|
||||
main_body:
|
||||
br i1 undef, label %if, label %end
|
||||
br i1 undef, label %if, label %end
|
||||
|
||||
if:
|
||||
br label %end
|
||||
|
@ -131,17 +112,6 @@
|
|||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
declare i32 @llvm.amdgcn.workitem.id.x() #1
|
||||
|
||||
declare { i1, i64 } @llvm.amdgcn.if(i1)
|
||||
|
||||
declare void @llvm.amdgcn.end.cf(i64)
|
||||
|
||||
|
||||
attributes #0 = { nounwind }
|
||||
attributes #1 = { nounwind readnone }
|
||||
|
||||
...
|
||||
---
|
||||
# CHECK-LABEL: name: optimize_if_and_saveexec_xor{{$}}
|
||||
|
@ -150,28 +120,8 @@
|
|||
# CHECK-NEXT: SI_MASK_BRANCH
|
||||
|
||||
name: optimize_if_and_saveexec_xor
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -190,7 +140,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -198,7 +148,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -208,28 +158,8 @@ body: |
|
|||
# CHECK-NEXT: SI_MASK_BRANCH
|
||||
|
||||
name: optimize_if_and_saveexec
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -247,7 +177,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -255,7 +185,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -265,28 +195,8 @@ body: |
|
|||
# CHECK-NEXT: SI_MASK_BRANCH
|
||||
|
||||
name: optimize_if_or_saveexec
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -304,7 +214,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -312,40 +222,20 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
---
|
||||
# CHECK-LABEL: name: optimize_if_and_saveexec_xor_valu_middle
|
||||
# CHECK: $sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
||||
# CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
|
||||
# CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
# CHECK-NEXT: $sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
# CHECK-NEXT: $exec = COPY killed $sgpr2_sgpr3
|
||||
# CHECK-NEXT: SI_MASK_BRANCH
|
||||
name: optimize_if_and_saveexec_xor_valu_middle
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -354,7 +244,7 @@ body: |
|
|||
$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
|
||||
$vgpr0 = V_MOV_B32_e32 4, implicit $exec
|
||||
$sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
||||
BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
$sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$exec = S_MOV_B64_term killed $sgpr2_sgpr3
|
||||
SI_MASK_BRANCH %bb.2, implicit $exec
|
||||
|
@ -365,7 +255,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -373,7 +263,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -384,28 +274,8 @@ body: |
|
|||
# CHECK-NEXT: $exec = COPY $sgpr0_sgpr1
|
||||
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
||||
name: optimize_if_and_saveexec_xor_wrong_reg
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -423,7 +293,7 @@ body: |
|
|||
|
||||
bb.1.if:
|
||||
liveins: $sgpr0_sgpr1 , $sgpr4_sgpr5_sgpr6_sgpr7
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1, $sgpr4_sgpr5_sgpr6_sgpr7
|
||||
|
@ -431,7 +301,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -444,28 +314,8 @@ body: |
|
|||
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
||||
|
||||
name: optimize_if_and_saveexec_xor_modify_copy_to_exec
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -485,7 +335,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -495,7 +345,7 @@ body: |
|
|||
$sgpr1 = S_MOV_B32 1
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -506,28 +356,8 @@ body: |
|
|||
# CHECK-NEXT: $exec = COPY $sgpr2_sgpr3
|
||||
# CHECK-NEXT: SI_MASK_BRANCH
|
||||
name: optimize_if_and_saveexec_xor_live_out_setexec
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -546,7 +376,7 @@ body: |
|
|||
S_SLEEP 0, implicit $sgpr2_sgpr3
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -554,7 +384,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -566,28 +396,8 @@ body: |
|
|||
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
||||
|
||||
name: optimize_if_unknown_saveexec
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -605,7 +415,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -613,7 +423,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -623,28 +433,8 @@ body: |
|
|||
# CHECK-NEXT: SI_MASK_BRANCH
|
||||
|
||||
name: optimize_if_andn2_saveexec
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -662,7 +452,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -670,7 +460,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
@ -680,28 +470,8 @@ body: |
|
|||
# CHECK-NEXT: $exec = COPY killed $sgpr2_sgpr3
|
||||
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
||||
name: optimize_if_andn2_saveexec_no_commute
|
||||
alignment: 0
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 0
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 0
|
||||
adjustsStack: false
|
||||
hasCalls: false
|
||||
maxCallFrameSize: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
body: |
|
||||
bb.0.main_body:
|
||||
liveins: $vgpr0
|
||||
|
@ -719,7 +489,7 @@ body: |
|
|||
|
||||
$sgpr7 = S_MOV_B32 61440
|
||||
$sgpr6 = S_MOV_B32 -1
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
||||
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
|
||||
|
||||
bb.2.end:
|
||||
liveins: $vgpr0, $sgpr0_sgpr1
|
||||
|
@ -727,7 +497,7 @@ body: |
|
|||
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
||||
$sgpr3 = S_MOV_B32 61440
|
||||
$sgpr2 = S_MOV_B32 -1
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
||||
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
|
||||
S_ENDPGM
|
||||
|
||||
...
|
||||
|
|
Loading…
Reference in New Issue