forked from OSchip/llvm-project
parent
2711c12f48
commit
259e98ed27
llvm/lib/Target/X86
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@ -42,8 +42,8 @@ bool X86InstrInfo::isNOPinstr(const MachineInstr &MI) const {
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// Make sure the instruction is EXACTLY `xchg ax, ax'
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if (MI.getOpcode() == X86::XCHGrr16) {
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const MachineOperand &op0 = MI.getOperand(0), &op1 = MI.getOperand(1);
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if (op0.isMachineRegister() && op0.getMachineRegNum() == X86::AX &&
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op1.isMachineRegister() && op1.getMachineRegNum() == X86::AX) {
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if (op0.isPhysicalRegister() && op0.getReg() == X86::AX &&
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op1.isPhysicalRegister() && op1.getReg() == X86::AX) {
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return true;
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}
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}
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