forked from OSchip/llvm-project
FastIsel: take care to update iterators when removing instructions.
We keep a few iterators into the basic block we're selecting while performing FastISel. Usually this is fine, but occasionally code wants to remove already-emitted instructions. When this happens we have to be careful to update those iterators so they're not pointint at dangling memory. llvm-svn: 349365
This commit is contained in:
parent
2d6833c9c9
commit
256a16d031
llvm
lib
CodeGen/SelectionDAG
Target
test/CodeGen/AArch64
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@ -547,6 +547,15 @@ void FastISel::removeDeadCode(MachineBasicBlock::iterator I,
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assert(I.isValid() && E.isValid() && std::distance(I, E) > 0 &&
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assert(I.isValid() && E.isValid() && std::distance(I, E) > 0 &&
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"Invalid iterator!");
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"Invalid iterator!");
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while (I != E) {
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while (I != E) {
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if (LastFlushPoint == I)
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LastFlushPoint = E;
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if (SavedInsertPt == I)
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SavedInsertPt = E;
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if (EmitStartPt == I)
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EmitStartPt = E.isValid() ? &*E : nullptr;
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if (LastLocalValue == I)
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LastLocalValue = E.isValid() ? &*E : nullptr;
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MachineInstr *Dead = &*I;
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MachineInstr *Dead = &*I;
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++I;
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++I;
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Dead->eraseFromParent();
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Dead->eraseFromParent();
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@ -2016,8 +2016,9 @@ bool AArch64FastISel::selectLoad(const Instruction *I) {
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if (RetVT == MVT::i64 && VT <= MVT::i32) {
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if (RetVT == MVT::i64 && VT <= MVT::i32) {
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if (WantZExt) {
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if (WantZExt) {
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// Delete the last emitted instruction from emitLoad (SUBREG_TO_REG).
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// Delete the last emitted instruction from emitLoad (SUBREG_TO_REG).
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std::prev(FuncInfo.InsertPt)->eraseFromParent();
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MachineBasicBlock::iterator I(std::prev(FuncInfo.InsertPt));
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ResultReg = std::prev(FuncInfo.InsertPt)->getOperand(0).getReg();
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ResultReg = std::prev(I)->getOperand(0).getReg();
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removeDeadCode(I, std::next(I));
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} else
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} else
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ResultReg = fastEmitInst_extractsubreg(MVT::i32, ResultReg,
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ResultReg = fastEmitInst_extractsubreg(MVT::i32, ResultReg,
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/*IsKill=*/true,
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/*IsKill=*/true,
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@ -2038,7 +2039,8 @@ bool AArch64FastISel::selectLoad(const Instruction *I) {
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break;
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break;
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}
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}
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}
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}
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MI->eraseFromParent();
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MachineBasicBlock::iterator I(MI);
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removeDeadCode(I, std::next(I));
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MI = nullptr;
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MI = nullptr;
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if (Reg)
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if (Reg)
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MI = MRI.getUniqueVRegDef(Reg);
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MI = MRI.getUniqueVRegDef(Reg);
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@ -4508,7 +4510,8 @@ bool AArch64FastISel::optimizeIntExtLoad(const Instruction *I, MVT RetVT,
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MI->getOperand(1).getSubReg() == AArch64::sub_32) &&
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MI->getOperand(1).getSubReg() == AArch64::sub_32) &&
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"Expected copy instruction");
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"Expected copy instruction");
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Reg = MI->getOperand(1).getReg();
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Reg = MI->getOperand(1).getReg();
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MI->eraseFromParent();
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MachineBasicBlock::iterator I(MI);
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removeDeadCode(I, std::next(I));
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}
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}
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updateValueMap(I, Reg);
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updateValueMap(I, Reg);
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return true;
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return true;
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@ -2951,7 +2951,8 @@ bool ARMFastISel::tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo,
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unsigned ResultReg = MI->getOperand(0).getReg();
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unsigned ResultReg = MI->getOperand(0).getReg();
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if (!ARMEmitLoad(VT, ResultReg, Addr, LI->getAlignment(), isZExt, false))
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if (!ARMEmitLoad(VT, ResultReg, Addr, LI->getAlignment(), isZExt, false))
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return false;
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return false;
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MI->eraseFromParent();
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MachineBasicBlock::iterator I(MI);
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removeDeadCode(I, std::next(I));
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return true;
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return true;
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}
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}
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@ -2354,7 +2354,8 @@ bool PPCFastISel::tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo,
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PPCSubTarget->hasSPE() ? PPC::EVLDD : PPC::LFD))
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PPCSubTarget->hasSPE() ? PPC::EVLDD : PPC::LFD))
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return false;
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return false;
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MI->eraseFromParent();
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MachineBasicBlock::iterator I(MI);
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removeDeadCode(I, std::next(I));
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return true;
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return true;
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}
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}
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@ -3998,7 +3998,8 @@ bool X86FastISel::tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo,
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}
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}
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Result->addMemOperand(*FuncInfo.MF, createMachineMemOperandFor(LI));
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Result->addMemOperand(*FuncInfo.MF, createMachineMemOperandFor(LI));
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MI->eraseFromParent();
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MachineBasicBlock::iterator I(MI);
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removeDeadCode(I, std::next(I));
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return true;
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return true;
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}
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}
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@ -0,0 +1,25 @@
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; RUN: llc -mtriple=arm64-apple-ios -o - %s -fast-isel=1 -O0 | FileCheck %s
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; The zext can be folded into the load and removed, but doing so can invalidate
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; pointers internal to FastISel and cause a crash so it must be done carefully.
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define i32 @test() {
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; CHECK-LABEL: test:
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; CHECK: ldrh
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; CHECK: bl _callee
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; CHECK-NOT: uxth
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entry:
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store i32 undef, i32* undef, align 4
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%t81 = load i16, i16* undef, align 2
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call void @callee()
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%t82 = zext i16 %t81 to i32
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%t83 = shl i32 %t82, 16
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%t84 = or i32 undef, %t83
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br label %end
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end:
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%val = phi i32 [%t84, %entry]
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ret i32 %val
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}
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declare void @callee()
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