maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Add intrinsics for the testct, testwct instructions. 

llvm-svn: 135475
This commit is contained in:
Richard Osborne 2011-07-19 13:00:40 +00:00
parent 707f0beae1
commit 252c43ee88
3 changed files with 29 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/include/llvm/IntrinsicsXCore.td
View File

@ -40,6 +40,10 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
[NoCapture<0>]>;
def int_xcore_chkct : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
[NoCapture<0>]>;
def int_xcore_testct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],
[NoCapture<0>]>;
def int_xcore_testwct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],
[NoCapture<0>]>;
def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
[NoCapture<0>]>;
def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],

10
llvm/lib/Target/XCore/XCoreInstrInfo.td
View File

@ -754,7 +754,7 @@ def BL_lu10 : _FLU10<
}
// Two operand short
// TODO eet, eef, testwct, tsetmr, sext (reg), zext (reg)
// TODO eet, eef, tsetmr, sext (reg), zext (reg)
def NOT : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
"not $dst, $b",
[(set GRRegs:$dst, (not GRRegs:$b))]>;
@ -846,6 +846,14 @@ def CHKCT_rus : _F2R<(outs), (ins GRRegs:$r, i32imm:$val),
"chkct res[$r], $val",
[(int_xcore_chkct GRRegs:$r, immUs:$val)]>;
def TESTCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src),
"testct $dst, res[$src]",
[(set GRRegs:$dst, (int_xcore_testct GRRegs:$src))]>;
def TESTWCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src),
"testwct $dst, res[$src]",
[(set GRRegs:$dst, (int_xcore_testwct GRRegs:$src))]>;
def SETD_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
"setd res[$r], $val",
[(int_xcore_setd GRRegs:$r, GRRegs:$val)]>;

16
llvm/test/CodeGen/XCore/resources.ll
View File

@ -9,6 +9,8 @@ declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
@ -214,3 +216,17 @@ define i32 @endin(i8 addrspace(1)* %r) {
%result = call i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define i32 @testct(i8 addrspace(1)* %r) {
; CHECK: testct:
; CHECK: testct r0, res[r0]
%result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define i32 @testwct(i8 addrspace(1)* %r) {
; CHECK: testwct:
; CHECK: testwct r0, res[r0]
%result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}