forked from OSchip/llvm-project
AMDGPU: Consolidate SMRD TableGen patterns
Summary: Merge the SMRD patterns for CI into the same multiclass as the patterns for other sub-targets. This removes some duplicate code and will make it easier for some future GlobalISel changes I would like to do. Reviewers: arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D52557 llvm-svn: 343909
This commit is contained in:
Tom Stellard
parent
b0a2a0cf7d
commit
251ee083a3
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@ -374,86 +374,6 @@ defm S_DCACHE_DISCARD : SM_Pseudo_Discards <"s_dcache_discard">;
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defm S_DCACHE_DISCARD_X2 : SM_Pseudo_Discards <"s_dcache_discard_x2">;
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}
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//===----------------------------------------------------------------------===//
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// Scalar Memory Patterns
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//===----------------------------------------------------------------------===//
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def smrd_load : PatFrag <(ops node:$ptr), (load node:$ptr), [{ return isUniformLoad(N);}]>;
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def SMRDImm : ComplexPattern<i64, 2, "SelectSMRDImm">;
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def SMRDImm32 : ComplexPattern<i64, 2, "SelectSMRDImm32">;
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def SMRDSgpr : ComplexPattern<i64, 2, "SelectSMRDSgpr">;
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def SMRDBufferImm : ComplexPattern<i32, 1, "SelectSMRDBufferImm">;
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def SMRDBufferImm32 : ComplexPattern<i32, 1, "SelectSMRDBufferImm32">;
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multiclass SMRD_Pattern <string Instr, ValueType vt> {
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// 1. IMM offset
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def : GCNPat <
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(smrd_load (SMRDImm i64:$sbase, i32:$offset)),
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(vt (!cast<SM_Pseudo>(Instr#"_IMM") $sbase, $offset, 0))
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>;
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// 2. SGPR offset
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def : GCNPat <
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(smrd_load (SMRDSgpr i64:$sbase, i32:$offset)),
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(vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $offset, 0))
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>;
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}
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multiclass SMLoad_Pattern <string Instr, ValueType vt> {
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// 1. Offset as an immediate
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// name this pattern to reuse AddedComplexity on CI
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def _IMM : GCNPat <
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(SIsbuffer_load v4i32:$sbase, (SMRDBufferImm i32:$offset), i1:$glc),
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(vt (!cast<SM_Pseudo>(Instr#"_IMM") $sbase, $offset, (as_i1imm $glc)))
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>;
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// 2. Offset loaded in an 32bit SGPR
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def : GCNPat <
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(SIsbuffer_load v4i32:$sbase, i32:$offset, i1:$glc),
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(vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $offset, (as_i1imm $glc)))
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>;
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}
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let OtherPredicates = [isSICI] in {
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def : GCNPat <
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(i64 (readcyclecounter)),
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(S_MEMTIME)
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>;
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}
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// Global and constant loads can be selected to either MUBUF or SMRD
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// instructions, but SMRD instructions are faster so we want the instruction
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// selector to prefer those.
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let AddedComplexity = 100 in {
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defm : SMRD_Pattern <"S_LOAD_DWORD", i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX2", v2i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX4", v4i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX8", v8i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX16", v16i32>;
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// Name the pattern to reuse AddedComplexity on CI
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defm SM_LOAD_PATTERN : SMLoad_Pattern <"S_BUFFER_LOAD_DWORD", i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX2", v2i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX4", v4i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX8", v8i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX16", v16i32>;
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} // End let AddedComplexity = 100
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let OtherPredicates = [isVI] in {
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def : GCNPat <
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(i64 (readcyclecounter)),
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(S_MEMREALTIME)
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>;
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} // let OtherPredicates = [isVI]
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//===----------------------------------------------------------------------===//
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// Targets
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//===----------------------------------------------------------------------===//
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@ -760,31 +680,91 @@ class SMRD_Real_ci <bits<5> op, SM_Pseudo ps>
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def S_DCACHE_INV_VOL_ci : SMRD_Real_ci <0x1d, S_DCACHE_INV_VOL>;
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let AddedComplexity = SM_LOAD_PATTERN_IMM.AddedComplexity in {
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//===----------------------------------------------------------------------===//
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// Scalar Memory Patterns
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//===----------------------------------------------------------------------===//
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class SMRD_Pattern_ci <string Instr, ValueType vt> : GCNPat <
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(smrd_load (SMRDImm32 i64:$sbase, i32:$offset)),
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(vt (!cast<InstSI>(Instr#"_IMM_ci") $sbase, $offset, 0))> {
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let OtherPredicates = [isCIOnly];
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def smrd_load : PatFrag <(ops node:$ptr), (load node:$ptr), [{ return isUniformLoad(N);}]>;
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def SMRDImm : ComplexPattern<i64, 2, "SelectSMRDImm">;
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def SMRDImm32 : ComplexPattern<i64, 2, "SelectSMRDImm32">;
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def SMRDSgpr : ComplexPattern<i64, 2, "SelectSMRDSgpr">;
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def SMRDBufferImm : ComplexPattern<i32, 1, "SelectSMRDBufferImm">;
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def SMRDBufferImm32 : ComplexPattern<i32, 1, "SelectSMRDBufferImm32">;
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multiclass SMRD_Pattern <string Instr, ValueType vt> {
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// 1. IMM offset
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def : GCNPat <
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(smrd_load (SMRDImm i64:$sbase, i32:$offset)),
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(vt (!cast<SM_Pseudo>(Instr#"_IMM") $sbase, $offset, 0))
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>;
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// 2. 32-bit IMM offset on CI
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def : GCNPat <
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(smrd_load (SMRDImm32 i64:$sbase, i32:$offset)),
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(vt (!cast<InstSI>(Instr#"_IMM_ci") $sbase, $offset, 0))> {
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let OtherPredicates = [isCIOnly];
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}
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// 3. SGPR offset
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def : GCNPat <
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(smrd_load (SMRDSgpr i64:$sbase, i32:$offset)),
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(vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $offset, 0))
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>;
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}
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def : SMRD_Pattern_ci <"S_LOAD_DWORD", i32>;
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def : SMRD_Pattern_ci <"S_LOAD_DWORDX2", v2i32>;
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def : SMRD_Pattern_ci <"S_LOAD_DWORDX4", v4i32>;
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def : SMRD_Pattern_ci <"S_LOAD_DWORDX8", v8i32>;
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def : SMRD_Pattern_ci <"S_LOAD_DWORDX16", v16i32>;
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multiclass SMLoad_Pattern <string Instr, ValueType vt> {
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// 1. Offset as an immediate
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def : GCNPat <
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(SIsbuffer_load v4i32:$sbase, (SMRDBufferImm i32:$offset), i1:$glc),
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(vt (!cast<SM_Pseudo>(Instr#"_IMM") $sbase, $offset, (as_i1imm $glc)))
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>;
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class SMLoad_Pattern_ci <string Instr, ValueType vt> : GCNPat <
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(vt (SIsbuffer_load v4i32:$sbase, (SMRDBufferImm32 i32:$offset), i1:$glc)),
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(!cast<InstSI>(Instr) $sbase, $offset, (as_i1imm $glc))> {
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let OtherPredicates = [isCIOnly];
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// 2. 32-bit IMM offset on CI
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def : GCNPat <
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(vt (SIsbuffer_load v4i32:$sbase, (SMRDBufferImm32 i32:$offset), i1:$glc)),
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(!cast<InstSI>(Instr#"_IMM_ci") $sbase, $offset, (as_i1imm $glc))> {
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let OtherPredicates = [isCIOnly];
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}
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// 3. Offset loaded in an 32bit SGPR
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def : GCNPat <
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(SIsbuffer_load v4i32:$sbase, i32:$offset, i1:$glc),
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(vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $offset, (as_i1imm $glc)))
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>;
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}
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def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORD_IMM_ci", i32>;
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def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORDX2_IMM_ci", v2i32>;
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def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORDX4_IMM_ci", v4i32>;
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def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORDX8_IMM_ci", v8i32>;
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def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORDX16_IMM_ci", v16i32>;
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// Global and constant loads can be selected to either MUBUF or SMRD
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// instructions, but SMRD instructions are faster so we want the instruction
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// selector to prefer those.
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let AddedComplexity = 100 in {
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} // End let AddedComplexity = SM_LOAD_PATTERN.AddedComplexity
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defm : SMRD_Pattern <"S_LOAD_DWORD", i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX2", v2i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX4", v4i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX8", v8i32>;
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defm : SMRD_Pattern <"S_LOAD_DWORDX16", v16i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORD", i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX2", v2i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX4", v4i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX8", v8i32>;
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defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX16", v16i32>;
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} // End let AddedComplexity = 100
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let OtherPredicates = [isSICI] in {
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def : GCNPat <
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(i64 (readcyclecounter)),
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(S_MEMTIME)
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>;
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}
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let OtherPredicates = [isVI] in {
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def : GCNPat <
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(i64 (readcyclecounter)),
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(S_MEMREALTIME)
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>;
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} // let OtherPredicates = [isVI]
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