forked from OSchip/llvm-project
[MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operands
If an ADRP appears with, say, a CPI operand, we shouldn't outline it. This moves the check for unsafe operands so that it occurs before the special-case for ADRPs. Also add a test for outlining ADRPs. llvm-svn: 328674
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@ -5053,6 +5053,13 @@ AArch64InstrInfo::getOutliningType(MachineBasicBlock::iterator &MIT,
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return MachineOutlinerInstrType::Illegal;
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}
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// Make sure none of the operands are un-outlinable.
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for (const MachineOperand &MOP : MI.operands()) {
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if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() ||
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MOP.isTargetIndex())
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return MachineOutlinerInstrType::Illegal;
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}
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// Special cases for instructions that can always be outlined, but will fail
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// the later tests. e.g, ADRPs, which are PC-relative use LR, but can always
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// be outlined because they don't require a *specific* value to be in LR.
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@ -5132,17 +5139,6 @@ AArch64InstrInfo::getOutliningType(MachineBasicBlock::iterator &MIT,
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MI.modifiesRegister(AArch64::W30, &getRegisterInfo()))
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return MachineOutlinerInstrType::Illegal;
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// Make sure none of the operands are un-outlinable.
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for (const MachineOperand &MOP : MI.operands()) {
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if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() ||
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MOP.isTargetIndex())
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return MachineOutlinerInstrType::Illegal;
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// Don't outline anything that uses the link register.
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if (MOP.isReg() && getRegisterInfo().regsOverlap(MOP.getReg(), AArch64::LR))
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return MachineOutlinerInstrType::Illegal;
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}
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// Does this use the stack?
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if (MI.modifiesRegister(AArch64::SP, &RI) ||
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MI.readsRegister(AArch64::SP, &RI)) {
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@ -0,0 +1,41 @@
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# RUN: llc -mtriple=aarch64--- -verify-machineinstrs -simplify-mir -run-pass=machine-outliner %s -o - | FileCheck %s
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--- |
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define void @foo() #0 {
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ret void
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}
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attributes #0 = { noredzone }
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...
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---
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name: foo
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constants:
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- id: 0
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value: 'float 1.990000e+02'
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alignment: 4
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isTargetSpecific: false
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body: |
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bb.0:
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liveins: $w1, $w10, $x14, $x15, $x16, $x10, $lr
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; CHECK-NOT: BL
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$w10 = MOVZWi 4, 0, implicit-def $x10
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renamable $x14 = ADRP target-flags(aarch64-page) %const.0
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renamable $x15 = ADRP target-flags(aarch64-page) %const.0
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renamable $x16 = ADRP target-flags(aarch64-page) %const.0
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$w10 = MOVZWi 5, 0, implicit-def $x10
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renamable $x14 = ADRP target-flags(aarch64-page) %const.0
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renamable $x15 = ADRP target-flags(aarch64-page) %const.0
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renamable $x16 = ADRP target-flags(aarch64-page) %const.0
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$w10 = MOVZWi 6, 0, implicit-def $x10
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renamable $x14 = ADRP target-flags(aarch64-page) %const.0
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renamable $x15 = ADRP target-flags(aarch64-page) %const.0
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renamable $x16 = ADRP target-flags(aarch64-page) %const.0
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RET undef $lr
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