From 24cfb7a992b08e726a953e7667a2f948a9aabf94 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@intel.com>
Date: Mon, 6 May 2019 23:08:17 +0000
Subject: [PATCH] [X86] Add test case to show that we don't set the kill flag
 properly for fast isel handling of fneg.

llvm-svn: 360096
---
 llvm/test/CodeGen/X86/fast-isel-fneg-kill.ll | 22 ++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/fast-isel-fneg-kill.ll

diff --git a/llvm/test/CodeGen/X86/fast-isel-fneg-kill.ll b/llvm/test/CodeGen/X86/fast-isel-fneg-kill.ll
new file mode 100644
index 000000000000..d3836012f906
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fast-isel-fneg-kill.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-apple-darwin10 -stop-after=expand-isel-pseudos | FileCheck %s
+
+; Make sure we output the right kill flag for the xor conversion.
+
+define void @goo(double* %x, double* %y) nounwind {
+; CHECK: %[[REG2:.*]]:gr64 = COPY $rsi
+; CHECK-NEXT: %[[REG0:.*]]:gr64 = COPY $rdi
+; CHECK-NEXT: %[[REG1:.*]]:gr64 = COPY killed %[[REG0]]
+; CHECK-NEXT: %[[REG3:.*]]:gr64 = COPY killed %[[REG2]]
+; CHECK-NEXT: %[[REG10:.*]]:fr64 = MOVSDrm %[[REG1]], 1, $noreg, 0, $noreg :: (load 8 from %ir.x)
+; CHECK-NEXT: %[[REG6:.*]]:gr64 = MOVSDto64rr %[[REG10]]
+; CHECK-NEXT: %[[REG7:.*]]:gr64 = MOV64ri -9223372036854775808
+; CHECK-NEXT: %[[REG8:.*]]:gr64 = XOR64rr killed %[[REG6]], %[[REG7]], implicit-def $eflags
+; CHECK-NEXT: %[[REG9:.*]]:fr64 = MOV64toSDrr killed %[[REG8]]
+; CHECK-NEXT: MOVSDmr %[[REG3]], 1, $noreg, 0, $noreg, killed %[[REG9]] :: (store 8 into %ir.y)
+; CHECK-NEXT: RETQ
+  %a = load double, double* %x
+  %b = fsub double -0.0, %a
+  store double %b, double* %y
+  ret void
+}