forked from OSchip/llvm-project
parent
6cb7f64e8b
commit
24b1c48514
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@ -120,7 +120,7 @@ static const Value *getUnderlyingObjectForInstr(const MachineInstr *MI,
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// such aliases.
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if (PSV->isAliased(MFI))
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return 0;
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MayAlias = PSV->mayAlias(MFI);
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return V;
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}
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@ -174,7 +174,7 @@ void ScheduleDAGInstrs::AddSchedBarrierDeps() {
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for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
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SE = BB->succ_end(); SI != SE; ++SI)
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for (MachineBasicBlock::livein_iterator I = (*SI)->livein_begin(),
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E = (*SI)->livein_end(); I != E; ++I) {
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E = (*SI)->livein_end(); I != E; ++I) {
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unsigned Reg = *I;
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if (Seen.insert(Reg))
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Uses[Reg].push_back(&ExitSU);
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@ -411,11 +411,11 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
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#define STORE_LOAD_LATENCY 1
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unsigned TrueMemOrderLatency = 0;
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if (TID.isCall() || MI->hasUnmodeledSideEffects() ||
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(MI->hasVolatileMemoryRef() &&
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(MI->hasVolatileMemoryRef() &&
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(!TID.mayLoad() || !MI->isInvariantLoad(AA)))) {
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// Be conservative with these and add dependencies on all memory
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// references, even those that are known to not alias.
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for (std::map<const Value *, SUnit *>::iterator I =
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for (std::map<const Value *, SUnit *>::iterator I =
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NonAliasMemDefs.begin(), E = NonAliasMemDefs.end(); I != E; ++I) {
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I->second->addPred(SDep(SU, SDep::Order, /*Latency=*/0));
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}
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@ -458,9 +458,9 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
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// A store to a specific PseudoSourceValue. Add precise dependencies.
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// Record the def in MemDefs, first adding a dep if there is
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// an existing def.
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std::map<const Value *, SUnit *>::iterator I =
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std::map<const Value *, SUnit *>::iterator I =
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((MayAlias) ? AliasMemDefs.find(V) : NonAliasMemDefs.find(V));
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std::map<const Value *, SUnit *>::iterator IE =
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std::map<const Value *, SUnit *>::iterator IE =
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((MayAlias) ? AliasMemDefs.end() : NonAliasMemDefs.end());
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if (I != IE) {
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I->second->addPred(SDep(SU, SDep::Order, /*Latency=*/0, /*Reg=*/0,
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@ -513,37 +513,37 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
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if (MI->isInvariantLoad(AA)) {
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// Invariant load, no chain dependencies needed!
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} else {
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if (const Value *V =
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if (const Value *V =
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getUnderlyingObjectForInstr(MI, MFI, MayAlias)) {
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// A load from a specific PseudoSourceValue. Add precise dependencies.
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std::map<const Value *, SUnit *>::iterator I =
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std::map<const Value *, SUnit *>::iterator I =
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((MayAlias) ? AliasMemDefs.find(V) : NonAliasMemDefs.find(V));
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std::map<const Value *, SUnit *>::iterator IE =
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std::map<const Value *, SUnit *>::iterator IE =
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((MayAlias) ? AliasMemDefs.end() : NonAliasMemDefs.end());
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if (I != IE)
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I->second->addPred(SDep(SU, SDep::Order, /*Latency=*/0, /*Reg=*/0,
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/*isNormalMemory=*/true));
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if (MayAlias)
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AliasMemUses[V].push_back(SU);
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else
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else
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NonAliasMemUses[V].push_back(SU);
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} else {
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// A load with no underlying object. Depend on all
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// potentially aliasing stores.
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for (std::map<const Value *, SUnit *>::iterator I =
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for (std::map<const Value *, SUnit *>::iterator I =
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AliasMemDefs.begin(), E = AliasMemDefs.end(); I != E; ++I)
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I->second->addPred(SDep(SU, SDep::Order, /*Latency=*/0));
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PendingLoads.push_back(SU);
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MayAlias = true;
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}
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// Add dependencies on alias and barrier chains, if needed.
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if (MayAlias && AliasChain)
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AliasChain->addPred(SDep(SU, SDep::Order, /*Latency=*/0));
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if (BarrierChain)
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BarrierChain->addPred(SDep(SU, SDep::Order, /*Latency=*/0));
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}
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}
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}
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}
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@ -572,11 +572,11 @@ void ScheduleDAGInstrs::ComputeLatency(SUnit *SU) {
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}
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}
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void ScheduleDAGInstrs::ComputeOperandLatency(SUnit *Def, SUnit *Use,
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void ScheduleDAGInstrs::ComputeOperandLatency(SUnit *Def, SUnit *Use,
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SDep& dep) const {
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if (!InstrItins || InstrItins->isEmpty())
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return;
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// For a data dependency with a known register...
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if ((dep.getKind() != SDep::Data) || (dep.getReg() == 0))
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return;
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