forked from OSchip/llvm-project
[Sparc] Treat %fxx registers with value type Other as single precision
They get type Other when used in the clobber list in inline assembly. This fixes tests fp128.ll and float.ll that failed after r333512. llvm-svn: 333523
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@ -3517,7 +3517,7 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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!name.substr(1).getAsInteger(10, intVal) && intVal <= 63) {
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std::string newConstraint;
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if (VT == MVT::f32) {
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if (VT == MVT::f32 || VT == MVT::Other) {
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newConstraint = "{f" + utostr(intVal) + "}";
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} else if (VT == MVT::f64 && (intVal % 2 == 0)) {
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newConstraint = "{d" + utostr(intVal / 2) + "}";
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