forked from OSchip/llvm-project
[X86][AVX512] add comi with Sae
add builtin_ia32_vcomisd and builtin_ia32_vcomisd Differential Revision: http://reviews.llvm.org/D14331 llvm-svn: 254493
This commit is contained in:
Asaf Badouh
parent
20f52662d4
commit
2489f350c0
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@ -6304,6 +6304,12 @@ let TargetPrefix = "x86" in {
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// Compares
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let TargetPrefix = "x86" in {
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// 512-bit
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def int_x86_avx512_vcomi_sd : GCCBuiltin<"__builtin_ia32_vcomisd">,
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Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty,
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llvm_v2f64_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_vcomi_ss : GCCBuiltin<"__builtin_ia32_vcomiss">,
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Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty,
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llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_pcmpeq_b_512 : GCCBuiltin<"__builtin_ia32_pcmpeqb512_mask">,
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Intrinsic<[llvm_i64_ty], [llvm_v64i8_ty, llvm_v64i8_ty, llvm_i64_ty],
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[IntrNoMem]>;
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@ -16528,6 +16528,24 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget
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DAG.getConstant(X86CC, dl, MVT::i8), Cond);
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return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
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}
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case COMI_RM: { // Comparison intrinsics with Sae
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SDValue LHS = Op.getOperand(1);
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SDValue RHS = Op.getOperand(2);
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SDValue CC = Op.getOperand(3);
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SDValue Sae = Op.getOperand(4);
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auto ComiType = TranslateX86ConstCondToX86CC(CC);
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// choose between ordered and unordered (comi/ucomi)
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unsigned comiOp = std::get<0>(ComiType) ? IntrData->Opc0 : IntrData->Opc1;
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SDValue Cond;
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if (cast<ConstantSDNode>(Sae)->getZExtValue() !=
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X86::STATIC_ROUNDING::CUR_DIRECTION)
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Cond = DAG.getNode(comiOp, dl, MVT::i32, LHS, RHS, Sae);
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else
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Cond = DAG.getNode(comiOp, dl, MVT::i32, LHS, RHS);
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SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
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DAG.getConstant(std::get<1>(ComiType), dl, MVT::i8), Cond);
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return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
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}
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case VSHIFT:
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return getTargetVShiftNode(IntrData->Opc0, dl, Op.getSimpleValueType(),
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Op.getOperand(1), Op.getOperand(2), DAG);
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@ -5605,6 +5605,29 @@ let Predicates = [HasAVX512] in {
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EVEX, EVEX_V128, EVEX_CD8<32, CD8VH>;
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}
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}
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// Unordered/Ordered scalar fp compare with Sea and set EFLAGS
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multiclass avx512_ord_cmp_sae<bits<8> opc, X86VectorVTInfo _, SDNode OpNode,
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string OpcodeStr> {
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def rb: AVX512<opc, MRMSrcReg, (outs), (ins _.RC:$src1, _.RC:$src2),
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!strconcat(OpcodeStr, "\t{{sae}, $src2, $src1|$src1, $src2, {sae}}"),
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[(set EFLAGS, (OpNode (_.VT _.RC:$src1), _.RC:$src2,
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(i32 FROUND_NO_EXC)))],
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IIC_SSE_COMIS_RR>, EVEX, EVEX_B, VEX_LIG, EVEX_V128,
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Sched<[WriteFAdd]>;
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}
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let Defs = [EFLAGS], Predicates = [HasAVX512] in {
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defm VUCOMISSZ : avx512_ord_cmp_sae<0x2E, v4f32x_info, X86ucomiSae, "vucomiss">,
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AVX512PSIi8Base, EVEX_CD8<32, CD8VT1>;
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defm VUCOMISDZ : avx512_ord_cmp_sae<0x2E, v2f64x_info, X86ucomiSae, "vucomisd">,
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AVX512PDIi8Base, VEX_W, EVEX_CD8<64, CD8VT1>;
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defm VCOMISSZ : avx512_ord_cmp_sae<0x2F, v4f32x_info, X86comiSae, "vcomiss">,
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AVX512PSIi8Base, EVEX_CD8<32, CD8VT1>;
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defm VCOMISDZ : avx512_ord_cmp_sae<0x2F, v2f64x_info, X86comiSae, "vcomisd">,
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AVX512PDIi8Base, VEX_W, EVEX_CD8<64, CD8VT1>;
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}
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let Defs = [EFLAGS], Predicates = [HasAVX512] in {
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defm VUCOMISSZ : sse12_ord_cmp<0x2E, FR32X, X86cmp, f32, f32mem, loadf32,
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"ucomiss">, PS, EVEX, VEX_LIG,
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@ -38,6 +38,8 @@ def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
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def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
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SDTCisFP<1>, SDTCisVT<3, i8>,
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SDTCisVec<1>]>;
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def SDTX86CmpTestSae : SDTypeProfile<1, 3, [SDTCisVT<0, i32>,
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SDTCisSameAs<1, 2>, SDTCisInt<3>]>;
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def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
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def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
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@ -66,7 +68,9 @@ def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
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def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
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def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
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def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
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def X86comiSae : SDNode<"X86ISD::COMI", SDTX86CmpTestSae>;
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def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
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def X86ucomiSae: SDNode<"X86ISD::UCOMI", SDTX86CmpTestSae>;
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def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
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//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
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def X86cvtdq2pd: SDNode<"X86ISD::CVTDQ2PD",
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@ -20,7 +20,7 @@ enum IntrinsicType {
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INTR_NO_TYPE,
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GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX, FPCLASS, FPCLASSS,
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INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_2OP_IMM8, INTR_TYPE_3OP, INTR_TYPE_4OP,
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CMP_MASK, CMP_MASK_CC,CMP_MASK_SCALAR_CC, VSHIFT, VSHIFT_MASK, COMI,
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CMP_MASK, CMP_MASK_CC,CMP_MASK_SCALAR_CC, VSHIFT, VSHIFT_MASK, COMI, COMI_RM,
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INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM,
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INTR_TYPE_2OP_MASK, INTR_TYPE_2OP_MASK_RM, INTR_TYPE_2OP_IMM8_MASK,
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INTR_TYPE_3OP_MASK, INTR_TYPE_3OP_MASK_RM, INTR_TYPE_3OP_IMM8_MASK,
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@ -1630,6 +1630,8 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx512_rsqrt28_ps, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),
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X86_INTRINSIC_DATA(avx512_rsqrt28_sd, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28, 0),
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X86_INTRINSIC_DATA(avx512_rsqrt28_ss, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28, 0),
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X86_INTRINSIC_DATA(avx512_vcomi_sd, COMI_RM, X86ISD::COMI, X86ISD::UCOMI),
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X86_INTRINSIC_DATA(avx512_vcomi_ss, COMI_RM, X86ISD::COMI, X86ISD::UCOMI),
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X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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X86_INTRINSIC_DATA(avx_hsub_pd_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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@ -1821,6 +1823,95 @@ static void verifyIntrinsicTables() {
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"Intrinsic data tables should have unique entries");
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}
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// X86 specific compare constants.
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// They must be kept in synch with avxintrin.h
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#define _X86_CMP_EQ_OQ 0x00 /* Equal (ordered, non-signaling) */
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#define _X86_CMP_LT_OS 0x01 /* Less-than (ordered, signaling) */
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#define _X86_CMP_LE_OS 0x02 /* Less-than-or-equal (ordered, signaling) */
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#define _X86_CMP_UNORD_Q 0x03 /* Unordered (non-signaling) */
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#define _X86_CMP_NEQ_UQ 0x04 /* Not-equal (unordered, non-signaling) */
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#define _X86_CMP_NLT_US 0x05 /* Not-less-than (unordered, signaling) */
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#define _X86_CMP_NLE_US 0x06 /* Not-less-than-or-equal (unordered, signaling) */
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#define _X86_CMP_ORD_Q 0x07 /* Ordered (nonsignaling) */
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#define _X86_CMP_EQ_UQ 0x08 /* Equal (unordered, non-signaling) */
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#define _X86_CMP_NGE_US 0x09 /* Not-greater-than-or-equal (unord, signaling) */
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#define _X86_CMP_NGT_US 0x0a /* Not-greater-than (unordered, signaling) */
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#define _X86_CMP_FALSE_OQ 0x0b /* False (ordered, non-signaling) */
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#define _X86_CMP_NEQ_OQ 0x0c /* Not-equal (ordered, non-signaling) */
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#define _X86_CMP_GE_OS 0x0d /* Greater-than-or-equal (ordered, signaling) */
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#define _X86_CMP_GT_OS 0x0e /* Greater-than (ordered, signaling) */
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#define _X86_CMP_TRUE_UQ 0x0f /* True (unordered, non-signaling) */
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#define _X86_CMP_EQ_OS 0x10 /* Equal (ordered, signaling) */
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#define _X86_CMP_LT_OQ 0x11 /* Less-than (ordered, non-signaling) */
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#define _X86_CMP_LE_OQ 0x12 /* Less-than-or-equal (ordered, non-signaling) */
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#define _X86_CMP_UNORD_S 0x13 /* Unordered (signaling) */
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#define _X86_CMP_NEQ_US 0x14 /* Not-equal (unordered, signaling) */
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#define _X86_CMP_NLT_UQ 0x15 /* Not-less-than (unordered, non-signaling) */
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#define _X86_CMP_NLE_UQ 0x16 /* Not-less-than-or-equal (unord, non-signaling) */
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#define _X86_CMP_ORD_S 0x17 /* Ordered (signaling) */
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#define _X86_CMP_EQ_US 0x18 /* Equal (unordered, signaling) */
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#define _X86_CMP_NGE_UQ 0x19 /* Not-greater-than-or-equal (unord, non-sign) */
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#define _X86_CMP_NGT_UQ 0x1a /* Not-greater-than (unordered, non-signaling) */
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#define _X86_CMP_FALSE_OS 0x1b /* False (ordered, signaling) */
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#define _X86_CMP_NEQ_OS 0x1c /* Not-equal (ordered, signaling) */
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#define _X86_CMP_GE_OQ 0x1d /* Greater-than-or-equal (ordered, non-signaling) */
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#define _X86_CMP_GT_OQ 0x1e /* Greater-than (ordered, non-signaling) */
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#define _X86_CMP_TRUE_US 0x1f /* True (unordered, signaling) */
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/*
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* Get comparison modifier from _mm_comi_round_sd/ss intrinsic
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* Return tuple <isOrdered, X86 condcode>
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*/
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static std::tuple<bool,unsigned> TranslateX86ConstCondToX86CC(SDValue &imm) {
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ConstantSDNode *CImm = dyn_cast<ConstantSDNode>(imm);
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unsigned IntImm = CImm->getZExtValue();
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// On a floating point condition, the flags are set as follows:
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// ZF PF CF op
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// 0 | 0 | 0 | X > Y
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// 0 | 0 | 1 | X < Y
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// 1 | 0 | 0 | X == Y
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// 1 | 1 | 1 | unordered
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switch (IntImm) {
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default: llvm_unreachable("Invalid floating point compare value for Comi!");
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case _X86_CMP_EQ_OQ: // 0x00 - Equal (ordered, nonsignaling)
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case _X86_CMP_EQ_OS: // 0x10 - Equal (ordered, signaling)
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return std::make_tuple(true, X86::COND_E);
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case _X86_CMP_EQ_UQ: // 0x08 - Equal (unordered, non-signaling)
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case _X86_CMP_EQ_US: // 0x18 - Equal (unordered, signaling)
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return std::make_tuple(false , X86::COND_E);
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case _X86_CMP_LT_OS: // 0x01 - Less-than (ordered, signaling)
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case _X86_CMP_LT_OQ: // 0x11 - Less-than (ordered, nonsignaling)
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return std::make_tuple(true, X86::COND_B);
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case _X86_CMP_NGE_US: // 0x09 - Not-greater-than-or-equal (unordered, signaling)
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case _X86_CMP_NGE_UQ: // 0x19 - Not-greater-than-or-equal (unordered, nonsignaling)
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return std::make_tuple(false , X86::COND_B);
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case _X86_CMP_LE_OS: // 0x02 - Less-than-or-equal (ordered, signaling)
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case _X86_CMP_LE_OQ: // 0x12 - Less-than-or-equal (ordered, nonsignaling)
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return std::make_tuple(true, X86::COND_BE);
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case _X86_CMP_NGT_US: // 0x0A - Not-greater-than (unordered, signaling)
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case _X86_CMP_NGT_UQ: // 0x1A - Not-greater-than (unordered, nonsignaling)
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return std::make_tuple(false, X86::COND_BE);
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case _X86_CMP_GT_OS: // 0x0E - Greater-than (ordered, signaling)
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case _X86_CMP_GT_OQ: // 0x1E - Greater-than (ordered, nonsignaling)
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return std::make_tuple(true, X86::COND_A);
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case _X86_CMP_NLE_US: // 0x06 - Not-less-than-or-equal (unordered,signaling)
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case _X86_CMP_NLE_UQ: // 0x16 - Not-less-than-or-equal (unordered, nonsignaling)
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return std::make_tuple(false, X86::COND_A);
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case _X86_CMP_GE_OS: // 0x0D - Greater-than-or-equal (ordered, signaling)
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case _X86_CMP_GE_OQ: // 0x1D - Greater-than-or-equal (ordered, nonsignaling)
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return std::make_tuple(true, X86::COND_AE);
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case _X86_CMP_NLT_US: // 0x05 - Not-less-than (unordered, signaling)
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case _X86_CMP_NLT_UQ: // 0x15 - Not-less-than (unordered, nonsignaling)
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return std::make_tuple(false, X86::COND_AE);
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case _X86_CMP_NEQ_OQ: // 0x0C - Not-equal (ordered, non-signaling)
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case _X86_CMP_NEQ_OS: // 0x1C - Not-equal (ordered, signaling)
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return std::make_tuple(true, X86::COND_NE);
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case _X86_CMP_NEQ_UQ: // 0x04 - Not-equal (unordered, nonsignaling)
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case _X86_CMP_NEQ_US: // 0x14 - Not-equal (unordered, signaling)
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return std::make_tuple(false, X86::COND_NE);
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}
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}
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} // End llvm namespace
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#endif
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@ -6159,3 +6159,78 @@ define <8 x double>@test_int_x86_avx512_mask_movddup_512(<8 x double> %x0, <8 x
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ret <8 x double> %res4
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}
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define i32 @test_x86_avx512_comi_sd_eq_sae(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_comi_sd_eq_sae
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; CHECK: vcomisd {sae}, %xmm1, %xmm0
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; CHECK-NEXT: sete %al
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 0, i32 8)
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ret i32 %res
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}
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define i32 @test_x86_avx512_ucomi_sd_eq_sae(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_ucomi_sd_eq_sae
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; CHECK: vucomisd {sae}, %xmm1, %xmm0
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; CHECK-NEXT: sete %al
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 8, i32 8)
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ret i32 %res
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}
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define i32 @test_x86_avx512_comi_sd_eq(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_comi_sd_eq
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; CHECK: vcomisd %xmm1, %xmm0
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; CHECK-NEXT: sete %al
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 0, i32 4)
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ret i32 %res
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}
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define i32 @test_x86_avx512_ucomi_sd_eq(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_ucomi_sd_eq
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; CHECK: vucomisd %xmm1, %xmm0
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; CHECK-NEXT: sete %al
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 8, i32 4)
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ret i32 %res
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}
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define i32 @test_x86_avx512_comi_sd_lt_sae(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_comi_sd_lt_sae
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; CHECK: vcomisd {sae}, %xmm1, %xmm0
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; CHECK-NEXT: sbbl %eax, %eax
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 1, i32 8)
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ret i32 %res
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}
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define i32 @test_x86_avx512_ucomi_sd_lt_sae(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_ucomi_sd_lt_sae
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; CHECK: vucomisd {sae}, %xmm1, %xmm0
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; CHECK-NEXT: sbbl %eax, %eax
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 9, i32 8)
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ret i32 %res
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}
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define i32 @test_x86_avx512_comi_sd_lt(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_comi_sd_lt
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; CHECK: vcomisd %xmm1, %xmm0
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; CHECK-NEXT: sbbl %eax, %eax
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%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 1, i32 4)
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ret i32 %res
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}
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define i32 @test_x86_avx512_ucomi_sd_lt(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: test_x86_avx512_ucomi_sd_lt
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; CHECK: vucomisd %xmm1, %xmm0
|
||||
; CHECK-NEXT: sbbl %eax, %eax
|
||||
%res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 9, i32 4)
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.avx512.vcomi.sd(<2 x double>, <2 x double>, i32, i32)
|
||||
|
||||
define i32 @test_x86_avx512_ucomi_ss_lt(<4 x float> %a0, <4 x float> %a1) {
|
||||
; CHECK-LABEL: test_x86_avx512_ucomi_ss_lt
|
||||
; CHECK: vucomiss %xmm1, %xmm0
|
||||
; CHECK-NEXT: sbbl %eax, %eax
|
||||
%res = call i32 @llvm.x86.avx512.vcomi.ss(<4 x float> %a0, <4 x float> %a1, i32 9, i32 4)
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.avx512.vcomi.ss(<4 x float>, <4 x float>, i32, i32)
|
||||
|
|
|
|||
|
|
@ -19093,3 +19093,130 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2
|
|||
// CHECK: encoding: [0x62,0x41,0xfd,0x08,0xd6,0xc4]
|
||||
vmovq.s %xmm24, %xmm12
|
||||
|
||||
// CHECK: vcomisd %xmm21, %xmm23
|
||||
// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x2f,0xfd]
|
||||
vcomisd %xmm21, %xmm23
|
||||
|
||||
// CHECK: vcomisd {sae}, %xmm21, %xmm23
|
||||
// CHECK: encoding: [0x62,0xa1,0xfd,0x18,0x2f,0xfd]
|
||||
vcomisd {sae}, %xmm21, %xmm23
|
||||
|
||||
// CHECK: vcomisd (%rcx), %xmm23
|
||||
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2f,0x39]
|
||||
vcomisd (%rcx), %xmm23
|
||||
|
||||
// CHECK: vcomisd 291(%rax,%r14,8), %xmm23
|
||||
// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x2f,0xbc,0xf0,0x23,0x01,0x00,0x00]
|
||||
vcomisd 291(%rax,%r14,8), %xmm23
|
||||
|
||||
// CHECK: vcomisd 1016(%rdx), %xmm23
|
||||
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2f,0x7a,0x7f]
|
||||
vcomisd 1016(%rdx), %xmm23
|
||||
|
||||
// CHECK: vcomisd 1024(%rdx), %xmm23
|
||||
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2f,0xba,0x00,0x04,0x00,0x00]
|
||||
vcomisd 1024(%rdx), %xmm23
|
||||
|
||||
// CHECK: vcomisd -1024(%rdx), %xmm23
|
||||
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2f,0x7a,0x80]
|
||||
vcomisd -1024(%rdx), %xmm23
|
||||
|
||||
// CHECK: vcomisd -1032(%rdx), %xmm23
|
||||
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2f,0xba,0xf8,0xfb,0xff,0xff]
|
||||
vcomisd -1032(%rdx), %xmm23
|
||||
|
||||
// CHECK: vcomiss %xmm28, %xmm14
|
||||
// CHECK: encoding: [0x62,0x11,0x7c,0x08,0x2f,0xf4]
|
||||
vcomiss %xmm28, %xmm14
|
||||
|
||||
// CHECK: vcomiss {sae}, %xmm28, %xmm14
|
||||
// CHECK: encoding: [0x62,0x11,0x7c,0x18,0x2f,0xf4]
|
||||
vcomiss {sae}, %xmm28, %xmm14
|
||||
|
||||
// CHECK: vcomiss (%rcx), %xmm14
|
||||
// CHECK: encoding: [0xc5,0x78,0x2f,0x31]
|
||||
vcomiss (%rcx), %xmm14
|
||||
|
||||
// CHECK: vcomiss 291(%rax,%r14,8), %xmm14
|
||||
// CHECK: encoding: [0xc4,0x21,0x78,0x2f,0xb4,0xf0,0x23,0x01,0x00,0x00]
|
||||
vcomiss 291(%rax,%r14,8), %xmm14
|
||||
|
||||
// CHECK: vcomiss 508(%rdx), %xmm14
|
||||
// CHECK: encoding: [0xc5,0x78,0x2f,0xb2,0xfc,0x01,0x00,0x00]
|
||||
vcomiss 508(%rdx), %xmm14
|
||||
|
||||
// CHECK: vcomiss 512(%rdx), %xmm14
|
||||
// CHECK: encoding: [0xc5,0x78,0x2f,0xb2,0x00,0x02,0x00,0x00]
|
||||
vcomiss 512(%rdx), %xmm14
|
||||
|
||||
// CHECK: vcomiss -512(%rdx), %xmm14
|
||||
// CHECK: encoding: [0xc5,0x78,0x2f,0xb2,0x00,0xfe,0xff,0xff]
|
||||
vcomiss -512(%rdx), %xmm14
|
||||
|
||||
// CHECK: vcomiss -516(%rdx), %xmm14
|
||||
// CHECK: encoding: [0xc5,0x78,0x2f,0xb2,0xfc,0xfd,0xff,0xff]
|
||||
vcomiss -516(%rdx), %xmm14
|
||||
|
||||
// CHECK: vucomisd %xmm10, %xmm11
|
||||
// CHECK: encoding: [0xc4,0x41,0x79,0x2e,0xda]
|
||||
vucomisd %xmm10, %xmm11
|
||||
|
||||
// CHECK: vucomisd {sae}, %xmm10, %xmm11
|
||||
// CHECK: encoding: [0x62,0x51,0xfd,0x18,0x2e,0xda]
|
||||
vucomisd {sae}, %xmm10, %xmm11
|
||||
|
||||
// CHECK: vucomisd (%rcx), %xmm11
|
||||
// CHECK: encoding: [0xc5,0x79,0x2e,0x19]
|
||||
vucomisd (%rcx), %xmm11
|
||||
|
||||
// CHECK: vucomisd 291(%rax,%r14,8), %xmm11
|
||||
// CHECK: encoding: [0xc4,0x21,0x79,0x2e,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vucomisd 291(%rax,%r14,8), %xmm11
|
||||
|
||||
// CHECK: vucomisd 1016(%rdx), %xmm11
|
||||
// CHECK: encoding: [0xc5,0x79,0x2e,0x9a,0xf8,0x03,0x00,0x00]
|
||||
vucomisd 1016(%rdx), %xmm11
|
||||
|
||||
// CHECK: vucomisd 1024(%rdx), %xmm11
|
||||
// CHECK: encoding: [0xc5,0x79,0x2e,0x9a,0x00,0x04,0x00,0x00]
|
||||
vucomisd 1024(%rdx), %xmm11
|
||||
|
||||
// CHECK: vucomisd -1024(%rdx), %xmm11
|
||||
// CHECK: encoding: [0xc5,0x79,0x2e,0x9a,0x00,0xfc,0xff,0xff]
|
||||
vucomisd -1024(%rdx), %xmm11
|
||||
|
||||
// CHECK: vucomisd -1032(%rdx), %xmm11
|
||||
// CHECK: encoding: [0xc5,0x79,0x2e,0x9a,0xf8,0xfb,0xff,0xff]
|
||||
vucomisd -1032(%rdx), %xmm11
|
||||
|
||||
// CHECK: vucomiss %xmm11, %xmm22
|
||||
// CHECK: encoding: [0x62,0xc1,0x7c,0x08,0x2e,0xf3]
|
||||
vucomiss %xmm11, %xmm22
|
||||
|
||||
// CHECK: vucomiss {sae}, %xmm11, %xmm22
|
||||
// CHECK: encoding: [0x62,0xc1,0x7c,0x18,0x2e,0xf3]
|
||||
vucomiss {sae}, %xmm11, %xmm22
|
||||
|
||||
// CHECK: vucomiss (%rcx), %xmm22
|
||||
// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x2e,0x31]
|
||||
vucomiss (%rcx), %xmm22
|
||||
|
||||
// CHECK: vucomiss 291(%rax,%r14,8), %xmm22
|
||||
// CHECK: encoding: [0x62,0xa1,0x7c,0x08,0x2e,0xb4,0xf0,0x23,0x01,0x00,0x00]
|
||||
vucomiss 291(%rax,%r14,8), %xmm22
|
||||
|
||||
// CHECK: vucomiss 508(%rdx), %xmm22
|
||||
// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x2e,0x72,0x7f]
|
||||
vucomiss 508(%rdx), %xmm22
|
||||
|
||||
// CHECK: vucomiss 512(%rdx), %xmm22
|
||||
// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x2e,0xb2,0x00,0x02,0x00,0x00]
|
||||
vucomiss 512(%rdx), %xmm22
|
||||
|
||||
// CHECK: vucomiss -512(%rdx), %xmm22
|
||||
// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x2e,0x72,0x80]
|
||||
vucomiss -512(%rdx), %xmm22
|
||||
|
||||
// CHECK: vucomiss -516(%rdx), %xmm22
|
||||
// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x2e,0xb2,0xfc,0xfd,0xff,0xff]
|
||||
vucomiss -516(%rdx), %xmm22
|
||||
|
|
|
|||
Loading…
Reference in New Issue