forked from OSchip/llvm-project
[OpenMP] RISCV64 port
This is a port of libomp for the RISC-V 64-bit Linux target. We have tested this port on a HiFive Unleashed development board using a downstream LLVM that has support for the missing bits in upstream. As of now, all tests are passing, including OMPT. Patch by Ferran Pallarès! Differential Revision: https://reviews.llvm.org/D59880 llvm-svn: 367021
This commit is contained in:
parent
d668260f1a
commit
2488ae9df1
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@ -133,7 +133,7 @@ Options for all Libraries
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Options for ``libomp``
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----------------------
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**LIBOMP_ARCH** = ``aarch64|arm|i386|mic|mips|mips64|ppc64|ppc64le|x86_64``
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**LIBOMP_ARCH** = ``aarch64|arm|i386|mic|mips|mips64|ppc64|ppc64le|x86_64|riscv64``
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The default value for this option is chosen based on probing the compiler for
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architecture macros (e.g., is ``__x86_64__`` predefined by compiler?).
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@ -189,8 +189,8 @@ Optional Features
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**LIBOMP_OMPT_SUPPORT** = ``ON|OFF``
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Include support for the OpenMP Tools Interface (OMPT).
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This option is supported and ``ON`` by default for x86, x86_64, AArch64, and
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PPC64 on Linux* and macOS*.
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This option is supported and ``ON`` by default for x86, x86_64, AArch64,
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PPC64 and RISCV64 on Linux* and macOS*.
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This option is ``OFF`` if this feature is not supported for the platform.
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**LIBOMP_OMPT_OPTIONAL** = ``ON|OFF``
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@ -30,7 +30,7 @@ if(${OPENMP_STANDALONE_BUILD})
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# If adding a new architecture, take a look at cmake/LibompGetArchitecture.cmake
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libomp_get_architecture(LIBOMP_DETECTED_ARCH)
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set(LIBOMP_ARCH ${LIBOMP_DETECTED_ARCH} CACHE STRING
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"The architecture to build for (x86_64/i386/arm/ppc64/ppc64le/aarch64/mic/mips/mips64).")
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"The architecture to build for (x86_64/i386/arm/ppc64/ppc64le/aarch64/mic/mips/mips64/riscv64).")
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# Should assertions be enabled? They are on by default.
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set(LIBOMP_ENABLE_ASSERTIONS TRUE CACHE BOOL
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"enable assertions?")
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@ -58,13 +58,15 @@ else() # Part of LLVM build
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set(LIBOMP_ARCH aarch64)
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elseif(LIBOMP_NATIVE_ARCH MATCHES "arm")
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set(LIBOMP_ARCH arm)
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elseif(LIBOMP_NATIVE_ARCH MATCHES "riscv64")
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set(LIBOMP_ARCH riscv64)
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else()
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# last ditch effort
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libomp_get_architecture(LIBOMP_ARCH)
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endif ()
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set(LIBOMP_ENABLE_ASSERTIONS ${LLVM_ENABLE_ASSERTIONS})
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endif()
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libomp_check_variable(LIBOMP_ARCH 32e x86_64 32 i386 arm ppc64 ppc64le aarch64 mic mips mips64)
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libomp_check_variable(LIBOMP_ARCH 32e x86_64 32 i386 arm ppc64 ppc64le aarch64 mic mips mips64 riscv64)
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set(LIBOMP_LIB_TYPE normal CACHE STRING
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"Performance,Profiling,Stubs library (normal/profile/stubs)")
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@ -142,6 +144,7 @@ set(PPC64 FALSE)
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set(MIC FALSE)
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set(MIPS64 FALSE)
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set(MIPS FALSE)
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set(RISCV64 FALSE)
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if("${LIBOMP_ARCH}" STREQUAL "i386" OR "${LIBOMP_ARCH}" STREQUAL "32") # IA-32 architecture
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set(IA32 TRUE)
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elseif("${LIBOMP_ARCH}" STREQUAL "x86_64" OR "${LIBOMP_ARCH}" STREQUAL "32e") # Intel(R) 64 architecture
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@ -162,6 +165,8 @@ elseif("${LIBOMP_ARCH}" STREQUAL "mips") # MIPS architecture
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set(MIPS TRUE)
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elseif("${LIBOMP_ARCH}" STREQUAL "mips64") # MIPS64 architecture
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set(MIPS64 TRUE)
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elseif("${LIBOMP_ARCH}" STREQUAL "riscv64") # RISCV64 architecture
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set(RISCV64 TRUE)
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endif()
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# Set some flags based on build_type
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@ -53,6 +53,7 @@ Architectures Supported
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* IBM(R) Power architecture (big endian)
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* IBM(R) Power architecture (little endian)
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* MIPS and MIPS64 architecture
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* RISCV64 architecture
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Supported RTL Build Configurations
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==================================
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@ -45,6 +45,8 @@ function(libomp_get_architecture return_arch)
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#error ARCHITECTURE=mips64
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#elif defined(__mips__) && !defined(__mips64)
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#error ARCHITECTURE=mips
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#elif defined(__riscv) && __riscv_xlen == 64
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#error ARCHITECTURE=riscv64
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#else
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#error ARCHITECTURE=UnknownArchitecture
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#endif
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@ -211,6 +211,9 @@ else()
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elseif(${MIPS} OR ${MIPS64})
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libomp_append(libomp_expected_library_deps libc.so.6)
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libomp_append(libomp_expected_library_deps ld.so.1)
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elseif(${RISCV64})
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libomp_append(libomp_expected_library_deps libc.so.6)
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libomp_append(libomp_expected_library_deps ld.so.1)
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endif()
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libomp_append(libomp_expected_library_deps libpthread.so.0 IF_FALSE STUBS_LIBRARY)
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libomp_append(libomp_expected_library_deps libhwloc.so.5 LIBOMP_USE_HWLOC)
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@ -105,6 +105,8 @@ function(libomp_get_legal_arch return_arch_string)
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set(${return_arch_string} "MIPS" PARENT_SCOPE)
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elseif(${MIPS64})
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set(${return_arch_string} "MIPS64" PARENT_SCOPE)
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elseif(${RISCV64})
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set(${return_arch_string} "RISCV64" PARENT_SCOPE)
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else()
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set(${return_arch_string} "${LIBOMP_ARCH}" PARENT_SCOPE)
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libomp_warning_say("libomp_get_legal_arch(): Warning: Unknown architecture: Using ${LIBOMP_ARCH}")
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@ -246,7 +246,8 @@ else()
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# (LIBOMP_ARCH STREQUAL arm) OR
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(LIBOMP_ARCH STREQUAL aarch64) OR
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(LIBOMP_ARCH STREQUAL ppc64le) OR
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(LIBOMP_ARCH STREQUAL ppc64))
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(LIBOMP_ARCH STREQUAL ppc64) OR
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(LIBOMP_ARCH STREQUAL riscv64))
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AND # OS supported?
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((WIN32 AND LIBOMP_HAVE_PSAPI) OR APPLE OR (NOT WIN32 AND LIBOMP_HAVE_WEAK_ATTRIBUTE)))
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set(LIBOMP_HAVE_OMPT_SUPPORT TRUE)
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@ -676,7 +676,8 @@ void __kmpc_flush(ident_t *loc) {
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#endif // KMP_COMPILER_ICC
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}
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#endif // KMP_MIC
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#elif (KMP_ARCH_ARM || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS || KMP_ARCH_MIPS64)
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#elif (KMP_ARCH_ARM || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS || KMP_ARCH_MIPS64 || \
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KMP_ARCH_RISCV64)
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// Nothing to see here move along
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#elif KMP_ARCH_PPC64
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// Nothing needed here (we have a real MB above).
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@ -165,7 +165,8 @@ typedef unsigned long long kmp_uint64;
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#if KMP_ARCH_X86 || KMP_ARCH_ARM || KMP_ARCH_MIPS
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#define KMP_SIZE_T_SPEC KMP_UINT32_SPEC
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#elif KMP_ARCH_X86_64 || KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS64
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#elif KMP_ARCH_X86_64 || KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || \
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KMP_ARCH_MIPS64 || KMP_ARCH_RISCV64
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#define KMP_SIZE_T_SPEC KMP_UINT64_SPEC
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#else
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#error "Can't determine size_t printf format specifier."
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@ -840,7 +841,7 @@ extern kmp_real64 __kmp_xchg_real64(volatile kmp_real64 *p, kmp_real64 v);
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#endif /* KMP_OS_WINDOWS */
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#if KMP_ARCH_PPC64 || KMP_ARCH_ARM || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS || \
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KMP_ARCH_MIPS64
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KMP_ARCH_MIPS64 || KMP_ARCH_RISCV64
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#define KMP_MB() __sync_synchronize()
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#endif
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@ -98,6 +98,7 @@
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#define KMP_ARCH_PPC64 (KMP_ARCH_PPC64_LE || KMP_ARCH_PPC64_BE)
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#define KMP_ARCH_MIPS 0
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#define KMP_ARCH_MIPS64 0
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#define KMP_ARCH_RISCV64 0
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#if KMP_OS_WINDOWS
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#if defined(_M_AMD64) || defined(__x86_64)
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@ -135,6 +136,9 @@
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#undef KMP_ARCH_MIPS
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#define KMP_ARCH_MIPS 1
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#endif
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#elif defined __riscv && __riscv_xlen == 64
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#undef KMP_ARCH_RISCV64
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#define KMP_ARCH_RISCV64 1
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#endif
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#endif
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@ -199,7 +203,7 @@
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// TODO: Fixme - This is clever, but really fugly
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#if (1 != \
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KMP_ARCH_X86 + KMP_ARCH_X86_64 + KMP_ARCH_ARM + KMP_ARCH_PPC64 + \
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KMP_ARCH_AARCH64 + KMP_ARCH_MIPS + KMP_ARCH_MIPS64)
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KMP_ARCH_AARCH64 + KMP_ARCH_MIPS + KMP_ARCH_MIPS64 + KMP_ARCH_RISCV64)
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#error Unknown or unsupported architecture
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#endif
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@ -8023,7 +8023,8 @@ __kmp_determine_reduction_method(
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int atomic_available = FAST_REDUCTION_ATOMIC_METHOD_GENERATED;
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#if KMP_ARCH_X86_64 || KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS64
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#if KMP_ARCH_X86_64 || KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || \
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KMP_ARCH_MIPS64 || KMP_ARCH_RISCV64
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#if KMP_OS_LINUX || KMP_OS_DRAGONFLY || KMP_OS_FREEBSD || KMP_OS_NETBSD || \
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KMP_OS_OPENBSD || KMP_OS_WINDOWS || KMP_OS_DARWIN || KMP_OS_HURD
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@ -161,6 +161,10 @@
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# define ITT_ARCH_MIPS64 6
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#endif /* ITT_ARCH_MIPS64 */
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#ifndef ITT_ARCH_RISCV64
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# define ITT_ARCH_RISCV64 7
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#endif /* ITT_ARCH_RISCV64 */
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#ifndef ITT_ARCH
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# if defined _M_IX86 || defined __i386__
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# define ITT_ARCH ITT_ARCH_IA32
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# define ITT_ARCH ITT_ARCH_MIPS
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# elif defined __mips__ && defined __mips64
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# define ITT_ARCH ITT_ARCH_MIPS64
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# elif defined __riscv && __riscv_xlen == 64
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# define ITT_ARCH ITT_ARCH_RISCV64
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# endif
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#endif
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@ -330,7 +336,9 @@ ITT_INLINE long __TBB_machine_fetchadd4(volatile void* ptr, long addend)
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: "memory");
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return result;
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}
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#elif ITT_ARCH==ITT_ARCH_ARM || ITT_ARCH==ITT_ARCH_PPC64 || ITT_ARCH==ITT_ARCH_AARCH64 || ITT_ARCH==ITT_ARCH_MIPS || ITT_ARCH==ITT_ARCH_MIPS64
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#elif ITT_ARCH == ITT_ARCH_ARM || ITT_ARCH == ITT_ARCH_PPC64 || \
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ITT_ARCH == ITT_ARCH_AARCH64 || ITT_ARCH == ITT_ARCH_MIPS || \
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ITT_ARCH == ITT_ARCH_MIPS64 || ITT_ARCH == ITT_ARCH_RISCV64
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#define __TBB_machine_fetchadd4(addr, val) __sync_fetch_and_add(addr, val)
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#endif /* ITT_ARCH==ITT_ARCH_IA64 */
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#ifndef ITT_SIMPLE_INIT
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@ -1563,6 +1563,173 @@ __kmp_invoke_microtask:
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#endif /* KMP_ARCH_PPC64 */
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#if KMP_ARCH_RISCV64
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//------------------------------------------------------------------------
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//
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// typedef void (*microtask_t)(int *gtid, int *tid, ...);
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//
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// int __kmp_invoke_microtask(microtask_t pkfn, int gtid, int tid, int argc,
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// void *p_argv[]
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// #if OMPT_SUPPORT
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// ,
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// void **exit_frame_ptr
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// #endif
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// ) {
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// #if OMPT_SUPPORT
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// *exit_frame_ptr = OMPT_GET_FRAME_ADDRESS(0);
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// #endif
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//
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// (*pkfn)(>id, &tid, argv[0], ...);
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//
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// return 1;
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// }
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//
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// Parameters:
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// a0: pkfn
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// a1: gtid
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// a2: tid
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// a3: argc
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// a4: p_argv
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// a5: exit_frame_ptr
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//
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// Locals:
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// __gtid: gtid param pushed on stack so can pass >id to pkfn
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// __tid: tid param pushed on stack so can pass &tid to pkfn
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//
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// Temp. registers:
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//
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// t0: used to calculate the dynamic stack size / used to hold pkfn address
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// t1: used as temporary for stack placement calculation
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// t2: used as temporary for stack arguments
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// t3: used as temporary for number of remaining pkfn parms
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// t4: used to traverse p_argv array
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//
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// return: a0 (always 1/TRUE)
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//
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__gtid = -20
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__tid = -24
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// -- Begin __kmp_invoke_microtask
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// mark_begin;
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.text
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.globl __kmp_invoke_microtask
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.p2align 1
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.type __kmp_invoke_microtask,@function
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__kmp_invoke_microtask:
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.cfi_startproc
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// First, save ra and fp
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addi sp, sp, -16
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sd ra, 8(sp)
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sd fp, 0(sp)
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addi fp, sp, 16
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.cfi_def_cfa fp, 0
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.cfi_offset ra, -8
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.cfi_offset fp, -16
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// Compute the dynamic stack size:
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//
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// - We need 8 bytes for storing 'gtid' and 'tid', so we can pass them by
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// reference
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// - We need 8 bytes for each argument that cannot be passed to the 'pkfn'
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// function by register. Given that we have 8 of such registers (a[0-7])
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// and two + 'argc' arguments (consider >id and &tid), we need to
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// reserve max(0, argc - 6)*8 extra bytes
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//
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// The total number of bytes is then max(0, argc - 6)*8 + 8
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// Compute max(0, argc - 6) using the following bithack:
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// max(0, x) = x - (x & (x >> 31)), where x := argc - 6
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// Source: http://graphics.stanford.edu/~seander/bithacks.html#IntegerMinOrMax
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addi t0, a3, -6
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srai t1, t0, 31
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and t1, t0, t1
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sub t0, t0, t1
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addi t0, t0, 1
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slli t0, t0, 3
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sub sp, sp, t0
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// Align the stack to 16 bytes
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andi sp, sp, -16
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mv t0, a0
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mv t3, a3
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mv t4, a4
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#if OMPT_SUPPORT
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// Save frame pointer into exit_frame
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sd fp, 0(a5)
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#endif
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// Prepare arguments for the pkfn function (first 8 using a0-a7 registers)
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sw a1, __gtid(fp)
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sw a2, __tid(fp)
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addi a0, fp, __gtid
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addi a1, fp, __tid
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beqz t3, .L_kmp_3
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ld a2, 0(t4)
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addi t3, t3, -1
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beqz t3, .L_kmp_3
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ld a3, 8(t4)
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addi t3, t3, -1
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beqz t3, .L_kmp_3
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ld a4, 16(t4)
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addi t3, t3, -1
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beqz t3, .L_kmp_3
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ld a5, 24(t4)
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addi t3, t3, -1
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beqz t3, .L_kmp_3
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ld a6, 32(t4)
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addi t3, t3, -1
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beqz t3, .L_kmp_3
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ld a7, 40(t4)
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// Prepare any additional argument passed through the stack
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addi t4, t4, 48
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mv t1, sp
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j .L_kmp_2
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.L_kmp_1:
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ld t2, 0(t4)
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sd t2, 0(t1)
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addi t4, t4, 8
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addi t1, t1, 8
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.L_kmp_2:
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addi t3, t3, -1
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bnez t3, .L_kmp_1
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.L_kmp_3:
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// Call pkfn function
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jalr t0
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// Restore stack and return
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addi a0, zero, 1
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addi sp, fp, -16
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ld fp, 0(sp)
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ld ra, 8(sp)
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addi sp, sp, 16
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ret
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.Lfunc_end0:
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.size __kmp_invoke_microtask, .Lfunc_end0-__kmp_invoke_microtask
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.cfi_endproc
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// -- End __kmp_invoke_microtask
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#endif /* KMP_ARCH_RISCV64 */
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#if KMP_ARCH_ARM || KMP_ARCH_MIPS
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.data
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.comm .gomp_critical_user_,32,8
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@ -1574,7 +1741,7 @@ __kmp_unnamed_critical_addr:
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.size __kmp_unnamed_critical_addr,4
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#endif /* KMP_ARCH_ARM */
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#if KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS64
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#if KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS64 || KMP_ARCH_RISCV64
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.data
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.comm .gomp_critical_user_,32,8
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.data
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@ -1583,7 +1750,8 @@ __kmp_unnamed_critical_addr:
|
|||
__kmp_unnamed_critical_addr:
|
||||
.8byte .gomp_critical_user_
|
||||
.size __kmp_unnamed_critical_addr,8
|
||||
#endif /* KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 */
|
||||
#endif /* KMP_ARCH_PPC64 || KMP_ARCH_AARCH64 || KMP_ARCH_MIPS64 ||
|
||||
KMP_ARCH_RISCV64 */
|
||||
|
||||
#if KMP_OS_LINUX
|
||||
# if KMP_ARCH_ARM
|
||||
|
|
|
@ -2331,7 +2331,8 @@ finish: // Clean up and exit.
|
|||
#endif // USE_LOAD_BALANCE
|
||||
|
||||
#if !(KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_MIC || \
|
||||
((KMP_OS_LINUX || KMP_OS_DARWIN) && KMP_ARCH_AARCH64) || KMP_ARCH_PPC64)
|
||||
((KMP_OS_LINUX || KMP_OS_DARWIN) && KMP_ARCH_AARCH64) || \
|
||||
KMP_ARCH_PPC64 || KMP_ARCH_RISCV64)
|
||||
|
||||
// we really only need the case with 1 argument, because CLANG always build
|
||||
// a struct of pointers to shared variables referenced in the outlined function
|
||||
|
|
|
@ -168,6 +168,26 @@ ompt_label_##id:
|
|||
#define print_possible_return_addresses(addr) \
|
||||
printf("%" PRIu64 ": current_address=%p or %p\n", ompt_get_thread_data()->value, \
|
||||
((char *)addr) - 4, ((char *)addr) - 8)
|
||||
#elif KMP_ARCH_RISCV64
|
||||
#if __riscv_compressed
|
||||
// On RV64GC the C.NOP instruction is 2 byte long. In addition, the compiler
|
||||
// inserts a J instruction (targeting the successor basic block), which
|
||||
// accounts for another 4 bytes. Finally, an additional J instruction may
|
||||
// appear (adding 4 more bytes) when the C.NOP is referenced elsewhere (ie.
|
||||
// another branch).
|
||||
#define print_possible_return_addresses(addr) \
|
||||
printf("%" PRIu64 ": current_address=%p or %p\n", \
|
||||
ompt_get_thread_data()->value, ((char *)addr) - 6, ((char *)addr) - 10)
|
||||
#else
|
||||
// On RV64G the NOP instruction is 4 byte long. In addition, the compiler
|
||||
// inserts a J instruction (targeting the successor basic block), which
|
||||
// accounts for another 4 bytes. Finally, an additional J instruction may
|
||||
// appear (adding 4 more bytes) when the NOP is referenced elsewhere (ie.
|
||||
// another branch).
|
||||
#define print_possible_return_addresses(addr) \
|
||||
printf("%" PRIu64 ": current_address=%p or %p\n", \
|
||||
ompt_get_thread_data()->value, ((char *)addr) - 8, ((char *)addr) - 12)
|
||||
#endif
|
||||
#else
|
||||
#error Unsupported target architecture, cannot determine address offset!
|
||||
#endif
|
||||
|
|
|
@ -61,6 +61,8 @@ sub canon_arch($) {
|
|||
$arch = "mips64";
|
||||
} elsif ( $arch =~ m{\Amips} ) {
|
||||
$arch = "mips";
|
||||
} elsif ( $arch =~ m{\Ariscv64} ) {
|
||||
$arch = "riscv64";
|
||||
} else {
|
||||
$arch = undef;
|
||||
}; # if
|
||||
|
@ -94,6 +96,7 @@ sub canon_mic_arch($) {
|
|||
"mic" => "Intel(R) Many Integrated Core Architecture",
|
||||
"mips" => "MIPS",
|
||||
"mips64" => "MIPS64",
|
||||
"riscv64" => "RISC-V (64-bit)",
|
||||
);
|
||||
|
||||
sub legal_arch($) {
|
||||
|
@ -220,6 +223,8 @@ sub target_options() {
|
|||
$_host_arch = "mips64";
|
||||
} elsif ( $hardware_platform eq "mips" ) {
|
||||
$_host_arch = "mips";
|
||||
} elsif ( $hardware_platform eq "riscv64" ) {
|
||||
$_host_arch = "riscv64";
|
||||
} else {
|
||||
die "Unsupported host hardware platform: \"$hardware_platform\"; stopped";
|
||||
}; # if
|
||||
|
@ -409,7 +414,7 @@ the script assumes host architecture is target one.
|
|||
|
||||
Input string is an architecture name to canonize. The function recognizes many variants, for example:
|
||||
C<32e>, C<Intel64>, C<Intel(R) 64>, etc. Returned string is a canononized architecture name,
|
||||
one of: C<32>, C<32e>, C<64>, C<arm>, C<ppc64le>, C<ppc64>, C<mic>, C<mips>, C<mips64>, or C<undef> is input string is not recognized.
|
||||
one of: C<32>, C<32e>, C<64>, C<arm>, C<ppc64le>, C<ppc64>, C<mic>, C<mips>, C<mips64>, C<riscv64> or C<undef> is input string is not recognized.
|
||||
|
||||
=item B<legal_arch( $arch )>
|
||||
|
||||
|
|
|
@ -156,6 +156,8 @@ if ( 0 ) {
|
|||
$values{ hardware_platform } = "mips64";
|
||||
} elsif ( $values{ machine } =~ m{\Amips\z} ) {
|
||||
$values{ hardware_platform } = "mips";
|
||||
} elsif ( $values{ machine } =~ m{\Ariscv64\z} ) {
|
||||
$values{ hardware_platform } = "riscv64";
|
||||
} else {
|
||||
die "Unsupported machine (\"$values{ machine }\") returned by POSIX::uname(); stopped";
|
||||
}; # if
|
||||
|
|
|
@ -53,6 +53,7 @@ Architectures Supported
|
|||
* IBM(R) Power architecture (big endian)
|
||||
* IBM(R) Power architecture (little endian)
|
||||
* MIPS and MIPS64 architectures
|
||||
* RISC-V 64 bit architecture
|
||||
|
||||
Supported RTL Build Configurations
|
||||
==================================
|
||||
|
|
|
@ -134,6 +134,7 @@
|
|||
the Intel compiler.
|
||||
</li>
|
||||
<li>MIPS and MIPS64</li>
|
||||
<li>RISC-V 64-bit</li>
|
||||
</ul>
|
||||
Ports to other architectures and operating systems are welcome.
|
||||
</p>
|
||||
|
|
Loading…
Reference in New Issue