From 2402b95db010e80f76804f07e0f59ffcae42fbdb Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Sat, 10 Dec 2016 00:52:50 +0000
Subject: [PATCH] AMDGPU: Fix AMDGPUPromoteAlloca breaking addrspacecasts

The users of the addrspacecast were having their types incorrectly
changed, producing invalid bitcasts between address spaces.

llvm-svn: 289307
---
 .../lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp |  9 +++++++-
 .../AMDGPU/promote-alloca-addrspacecast.ll    | 21 +++++++++++++++++++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
index 296a8aa9c589..baa28de7a770 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
@@ -579,6 +579,12 @@ bool AMDGPUPromoteAlloca::collectUsesWithPtrTypes(
       WorkList.push_back(ICmp);
     }
 
+    if (UseInst->getOpcode() == Instruction::AddrSpaceCast) {
+      // Don't collect the users of this.
+      WorkList.push_back(User);
+      continue;
+    }
+
     if (!User->getType()->isPointerTy())
       continue;
 
@@ -739,7 +745,8 @@ void AMDGPUPromoteAlloca::handleAlloca(AllocaInst &I) {
         continue;
       }
 
-      // The operand's value should be corrected on its own.
+      // The operand's value should be corrected on its own and we don't want to
+      // touch the users.
       if (isa<AddrSpaceCastInst>(V))
         continue;
 
diff --git a/llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll b/llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll
new file mode 100644
index 000000000000..f00b3de857f3
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll
@@ -0,0 +1,21 @@
+; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s
+
+; The types of the users of the addrspacecast should not be changed.
+
+; CHECK-LABEL: @invalid_bitcast_addrspace(
+; CHECK: getelementptr inbounds [256 x [1 x i32]], [256 x [1 x i32]] addrspace(3)* @invalid_bitcast_addrspace.data, i32 0, i32 %14
+; CHECK: bitcast [1 x i32] addrspace(3)* %{{[0-9]+}} to half addrspace(3)*
+; CHECK: addrspacecast half addrspace(3)* %tmp to half addrspace(4)*
+; CHECK: bitcast half addrspace(4)* %tmp1 to <2 x i16> addrspace(4)*
+define amdgpu_kernel void @invalid_bitcast_addrspace() #0 {
+entry:
+  %data = alloca [1 x i32], align 4
+  %tmp = bitcast [1 x i32]* %data to half*
+  %tmp1 = addrspacecast half* %tmp to half addrspace(4)*
+  %tmp2 = bitcast half addrspace(4)* %tmp1 to <2 x i16> addrspace(4)*
+  %tmp3 = load <2 x i16>, <2 x i16> addrspace(4)* %tmp2, align 2
+  %tmp4 = bitcast <2 x i16> %tmp3 to <2 x half>
+  ret void
+}
+
+attributes #0 = { nounwind }