Clean up some DOxygen comments.

llvm-svn: 170628
This commit is contained in:
Jim Grosbach 2012-12-20 01:14:45 +00:00
parent a7bb16ad86
commit 23f1f957d5
1 changed files with 25 additions and 26 deletions

View File

@ -230,7 +230,7 @@ public:
friend class MCRegUnitIterator; friend class MCRegUnitIterator;
friend class MCRegUnitRootIterator; friend class MCRegUnitRootIterator;
/// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen /// \brief Initialize MCRegisterInfo, called by TableGen
/// auto-generated routines. *DO NOT USE*. /// auto-generated routines. *DO NOT USE*.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA,
unsigned PC, unsigned PC,
@ -257,7 +257,7 @@ public:
RegEncodingTable = RET; RegEncodingTable = RET;
} }
/// mapLLVMRegsToDwarfRegs - Used to initialize LLVM register to Dwarf /// \brief Used to initialize LLVM register to Dwarf
/// register number mapping. Called by TableGen auto-generated routines. /// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*. /// *DO NOT USE*.
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size, void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size,
@ -271,7 +271,7 @@ public:
} }
} }
/// mapDwarfRegsToLLVMRegs - Used to initialize Dwarf register to LLVM /// \brief Used to initialize Dwarf register to LLVM
/// register number mapping. Called by TableGen auto-generated routines. /// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*. /// *DO NOT USE*.
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size, void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size,
@ -294,7 +294,7 @@ public:
L2SEHRegs[LLVMReg] = SEHReg; L2SEHRegs[LLVMReg] = SEHReg;
} }
/// getRARegister - This method should return the register where the return /// \brief This method should return the register where the return
/// address can be found. /// address can be found.
unsigned getRARegister() const { unsigned getRARegister() const {
return RAReg; return RAReg;
@ -311,65 +311,63 @@ public:
return Desc[RegNo]; return Desc[RegNo];
} }
/// Provide a get method, equivalent to [], but more useful if we have a /// \brief Provide a get method, equivalent to [], but more useful with a
/// pointer to this object. /// pointer to this object.
///
const MCRegisterDesc &get(unsigned RegNo) const { const MCRegisterDesc &get(unsigned RegNo) const {
return operator[](RegNo); return operator[](RegNo);
} }
/// getSubReg - Returns the physical register number of sub-register "Index" /// \brief Returns the physical register number of sub-register "Index"
/// for physical register RegNo. Return zero if the sub-register does not /// for physical register RegNo. Return zero if the sub-register does not
/// exist. /// exist.
unsigned getSubReg(unsigned Reg, unsigned Idx) const; unsigned getSubReg(unsigned Reg, unsigned Idx) const;
/// getMatchingSuperReg - Return a super-register of the specified register /// \brief Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg. /// Reg so its sub-register of index SubIdx is Reg.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const MCRegisterClass *RC) const; const MCRegisterClass *RC) const;
/// getSubRegIndex - For a given register pair, return the sub-register index /// \brief For a given register pair, return the sub-register index
/// if the second register is a sub-register of the first. Return zero /// if the second register is a sub-register of the first. Return zero
/// otherwise. /// otherwise.
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const; unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
/// getName - Return the human-readable symbolic target-specific name for the /// \brief Return the human-readable symbolic target-specific name for the
/// specified physical register. /// specified physical register.
const char *getName(unsigned RegNo) const { const char *getName(unsigned RegNo) const {
return RegStrings + get(RegNo).Name; return RegStrings + get(RegNo).Name;
} }
/// getNumRegs - Return the number of registers this target has (useful for /// \brief Return the number of registers this target has (useful for
/// sizing arrays holding per register information) /// sizing arrays holding per register information)
unsigned getNumRegs() const { unsigned getNumRegs() const {
return NumRegs; return NumRegs;
} }
/// getNumSubRegIndices - Return the number of sub-register indices /// \brief Return the number of sub-register indices
/// understood by the target. Index 0 is reserved for the no-op sub-register, /// understood by the target. Index 0 is reserved for the no-op sub-register,
/// while 1 to getNumSubRegIndices() - 1 represent real sub-registers. /// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
unsigned getNumSubRegIndices() const { unsigned getNumSubRegIndices() const {
return NumSubRegIndices; return NumSubRegIndices;
} }
/// getNumRegUnits - Return the number of (native) register units in the /// \brief Return the number of (native) register units in the
/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They /// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
/// can be accessed through MCRegUnitIterator defined below. /// can be accessed through MCRegUnitIterator defined below.
unsigned getNumRegUnits() const { unsigned getNumRegUnits() const {
return NumRegUnits; return NumRegUnits;
} }
/// getDwarfRegNum - Map a target register to an equivalent dwarf register /// \brief Map a target register to an equivalent dwarf register
/// number. Returns -1 if there is no equivalent value. The second /// number. Returns -1 if there is no equivalent value. The second
/// parameter allows targets to use different numberings for EH info and /// parameter allows targets to use different numberings for EH info and
/// debugging info. /// debugging info.
int getDwarfRegNum(unsigned RegNum, bool isEH) const; int getDwarfRegNum(unsigned RegNum, bool isEH) const;
/// getLLVMRegNum - Map a dwarf register back to a target register. /// \brief Map a dwarf register back to a target register.
///
int getLLVMRegNum(unsigned RegNum, bool isEH) const; int getLLVMRegNum(unsigned RegNum, bool isEH) const;
/// getSEHRegNum - Map a target register to an equivalent SEH register /// \brief Map a target register to an equivalent SEH register
/// number. Returns LLVM register number if there is no equivalent value. /// number. Returns LLVM register number if there is no equivalent value.
int getSEHRegNum(unsigned RegNum) const; int getSEHRegNum(unsigned RegNum) const;
@ -380,34 +378,35 @@ public:
return (unsigned)(regclass_end()-regclass_begin()); return (unsigned)(regclass_end()-regclass_begin());
} }
/// getRegClass - Returns the register class associated with the enumeration /// \brief Returns the register class associated with the enumeration
/// value. See class MCOperandInfo. /// value. See class MCOperandInfo.
const MCRegisterClass& getRegClass(unsigned i) const { const MCRegisterClass& getRegClass(unsigned i) const {
assert(i < getNumRegClasses() && "Register Class ID out of range"); assert(i < getNumRegClasses() && "Register Class ID out of range");
return Classes[i]; return Classes[i];
} }
/// getEncodingValue - Returns the encoding for RegNo /// \brief Returns the encoding for RegNo
uint16_t getEncodingValue(unsigned RegNo) const { uint16_t getEncodingValue(unsigned RegNo) const {
assert(RegNo < NumRegs && assert(RegNo < NumRegs &&
"Attempting to get encoding for invalid register number!"); "Attempting to get encoding for invalid register number!");
return RegEncodingTable[RegNo]; return RegEncodingTable[RegNo];
} }
/// Returns true if RegB is a sub-register of RegA. /// \brief Returns true if RegB is a sub-register of RegA.
bool isSubRegister(unsigned RegA, unsigned RegB) const { bool isSubRegister(unsigned RegA, unsigned RegB) const {
return isSuperRegister(RegB, RegA); return isSuperRegister(RegB, RegA);
} }
/// Returns true if RegB is a super-register of RegA. /// \brief Returns true if RegB is a super-register of RegA.
bool isSuperRegister(unsigned RegA, unsigned RegB) const; bool isSuperRegister(unsigned RegA, unsigned RegB) const;
/// Returns true if RegB is a sub-register of RegA or if RegB == RegA. /// \brief Returns true if RegB is a sub-register of RegA or if RegB == RegA.
bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { bool isSubRegisterEq(unsigned RegA, unsigned RegB) const {
return isSuperRegisterEq(RegB, RegA); return isSuperRegisterEq(RegB, RegA);
} }
/// Returns true if RegB is a super-register of RegA or if RegB == RegA. /// \brief Returns true if RegB is a super-register of RegA or if
/// RegB == RegA.
bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const {
return RegA == RegB || isSuperRegister(RegA, RegB); return RegA == RegB || isSuperRegister(RegA, RegB);
} }
@ -519,17 +518,17 @@ public:
Reg1 = MCRI->RegUnitRoots[RegUnit][1]; Reg1 = MCRI->RegUnitRoots[RegUnit][1];
} }
/// Dereference to get the current root register. /// \brief Dereference to get the current root register.
unsigned operator*() const { unsigned operator*() const {
return Reg0; return Reg0;
} }
/// isValid - Check if the iterator is at the end of the list. /// \brief Check if the iterator is at the end of the list.
bool isValid() const { bool isValid() const {
return Reg0; return Reg0;
} }
/// Preincrement to move to the next root register. /// \brief Preincrement to move to the next root register.
void operator++() { void operator++() {
assert(isValid() && "Cannot move off the end of the list."); assert(isValid() && "Cannot move off the end of the list.");
Reg0 = Reg1; Reg0 = Reg1;