maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Rework braindead conditionals I put in yesterday. 

llvm-svn: 111974
This commit is contained in:
Eric Christopher 2010-08-24 22:07:27 +00:00
parent 6c99ebf5b0
commit 236ec8f3b5
1 changed files with 11 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
llvm/lib/Target/ARM/ARMFastISel.cpp
View File

@ -365,20 +365,18 @@ bool ARMFastISel::ARMLoadAlloca(const Instruction *I) {
Value *Op0 = I->getOperand(0);
// Verify it's an alloca.
const Instruction *Inst = dyn_cast<Instruction>(Op0);
if (!Inst || Inst->getOpcode() != Instruction::Alloca) return false;
if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op0)) {
DenseMap<const AllocaInst*, int>::iterator SI =
FuncInfo.StaticAllocaMap.find(AI);
const AllocaInst *AI = cast<AllocaInst>(Op0);
DenseMap<const AllocaInst*, int>::iterator SI =
FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
unsigned ResultReg = createResultReg(FixedRC);
TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt,
ResultReg, SI->second, FixedRC,
TM.getRegisterInfo());
UpdateValueMap(I, ResultReg);
return true;
if (SI != FuncInfo.StaticAllocaMap.end()) {
unsigned ResultReg = createResultReg(FixedRC);
TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt,
ResultReg, SI->second, FixedRC,
TM.getRegisterInfo());
UpdateValueMap(I, ResultReg);
return true;
}
}
return false;