forked from OSchip/llvm-project
parent
9db8e15f4d
commit
233890547d
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@ -1844,6 +1844,7 @@ def : MnemonicAlias<"stm", "stmia">;
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// FIXME: Should pc be an implicit operand like PICADD, etc?
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// FIXME: Should pc be an implicit operand like PICADD, etc?
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let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
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let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
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hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in
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hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in
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// FIXME: Should be a pseudo-instruction.
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def LDMIA_RET : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p,
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def LDMIA_RET : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p,
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reglist:$regs, variable_ops),
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reglist:$regs, variable_ops),
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IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr,
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IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr,
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