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[X86] Correct the ins operand order for MASKPAIR16STORE to match other store instructions. 

This makes the 5 address operands come first. And the data operand comes last.

This matches the operand order the instruction is created with. It's also the
expected order in X86MCInstLower. So everything appeared to work, but the
operands didn't match their declared type.

Fixes a -verify-machineinstrs failure.

Also remove the isel patterns from these instructions since they should only
be used for stack spills and reloads. I'm not even sure what types the patterns
were looking for to match.

llvm-svn: 362193
This commit is contained in:
Craig Topper 2019-05-31 05:20:27 +00:00
parent c9e27be585
commit 23066033a1
2 changed files with 6 additions and 6 deletions
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8
llvm/lib/Target/X86/X86InstrAVX512.td
View File

@ -12561,10 +12561,10 @@ defm VP4DPWSSDSrm : AVX512_maskable_3src_in_asm<0x53, MRMSrcMem, v16i32_info,
} }
let hasSideEffects = 0 in { let hasSideEffects = 0 in {
def MASKPAIR16STORE : PseudoI<(outs), (ins VK16PAIR:$src, anymem:$dst), let mayStore = 1 in
[(store VK16PAIR:$src, addr:$dst)]>; def MASKPAIR16STORE : PseudoI<(outs), (ins anymem:$dst, VK16PAIR:$src), []>;
def MASKPAIR16LOAD : PseudoI<(outs VK16PAIR:$dst), (ins anymem:$src), let mayLoad = 1 in
[(set VK16PAIR:$dst, (load addr:$src))]>; def MASKPAIR16LOAD : PseudoI<(outs VK16PAIR:$dst), (ins anymem:$src), []>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

4
llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
View File

@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect | FileCheck %s --check-prefixes=CHECK,X86 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect | FileCheck %s --check-prefixes=CHECK,X64 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X64
; Test with more than four live mask pairs ; Test with more than four live mask pairs