forked from OSchip/llvm-project
Fix build failures from r337347, found by clang
* Delete a no-longer-used override, and mark the other getRegisterTypeForCallingConv() as override. * SPE only supports i32, not i64, as the internal type, so simply remove the type check, so that DestReg and Opc are provably always set. GCC 6.4 did not warn about either of the above. llvm-svn: 337350
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@ -1223,13 +1223,11 @@ bool PPCFastISel::SelectFPToI(const Instruction *I, bool IsSigned) {
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unsigned Opc;
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if (PPCSubTarget->hasSPE()) {
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if (DstVT == MVT::i32) {
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DestReg = createResultReg(&PPC::GPRCRegClass);
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if (IsSigned)
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Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
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else
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Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
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}
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DestReg = createResultReg(&PPC::GPRCRegClass);
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if (IsSigned)
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Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
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else
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Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
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} else {
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DestReg = createResultReg(&PPC::F8RCRegClass);
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if (DstVT == MVT::i32)
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@ -1237,12 +1237,6 @@ MVT PPCTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
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return PPCTargetLowering::getRegisterType(Context, VT);
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}
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MVT PPCTargetLowering::getRegisterTypeForCallingConv(MVT VT) const {
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if (Subtarget.hasSPE() && VT == MVT::f64)
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return MVT::i32;
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return PPCTargetLowering::getRegisterType(VT);
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}
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bool PPCTargetLowering::useSoftFloat() const {
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return Subtarget.useSoftFloat();
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}
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@ -874,9 +874,8 @@ namespace llvm {
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unsigned getNumRegistersForCallingConv(LLVMContext &Context,
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EVT VT) const override;
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MVT getRegisterTypeForCallingConv(MVT VT) const;
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MVT getRegisterTypeForCallingConv(LLVMContext &Context,
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EVT VT) const;
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EVT VT) const override;
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private:
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struct ReuseLoadInfo {
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