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Test commit 

llvm-svn: 322958
This commit is contained in:
Carey Williams 2018-01-19 16:55:23 +00:00
parent 74a1eef7c4
commit 22c49c6470
1 changed files with 1 additions and 1 deletions
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2
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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@ -8839,7 +8839,7 @@ static SDValue performConcatVectorsCombine(SDNode *N,
static SDValue tryCombineFixedPointConvert(SDNode *N,
TargetLowering::DAGCombinerInfo &DCI,
SelectionDAG &DAG) {
// Wait 'til after everything is legalized to try this. That way we have
// Wait until after everything is legalized to try this. That way we have
// legal vector types and such.
if (DCI.isBeforeLegalizeOps())
return SDValue();