forked from OSchip/llvm-project
[X86][AVX] Add v2i32 fp to int conversion tests
llvm-svn: 279520
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bb56052b66
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22c415a696
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@ -53,8 +53,8 @@ define <2 x i64> @fptosi_2f64_to_2i64(<2 x double> %a) {
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ret <2 x i64> %cvt
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}
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define <4 x i32> @fptosi_2f64_to_2i32(<2 x double> %a) {
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; SSE-LABEL: fptosi_2f64_to_2i32:
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define <4 x i32> @fptosi_2f64_to_4i32(<2 x double> %a) {
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; SSE-LABEL: fptosi_2f64_to_4i32:
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; SSE: # BB#0:
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; SSE-NEXT: cvttsd2si %xmm0, %rax
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; SSE-NEXT: movd %rax, %xmm1
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@ -65,7 +65,7 @@ define <4 x i32> @fptosi_2f64_to_2i32(<2 x double> %a) {
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: fptosi_2f64_to_2i32:
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; AVX-LABEL: fptosi_2f64_to_4i32:
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; AVX: # BB#0:
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; AVX-NEXT: vcvttsd2si %xmm0, %rax
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; AVX-NEXT: vmovq %rax, %xmm1
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@ -76,7 +76,7 @@ define <4 x i32> @fptosi_2f64_to_2i32(<2 x double> %a) {
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; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; AVX-NEXT: retq
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;
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; AVX512F-LABEL: fptosi_2f64_to_2i32:
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; AVX512F-LABEL: fptosi_2f64_to_4i32:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vcvttsd2si %xmm0, %rax
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; AVX512F-NEXT: vmovq %rax, %xmm1
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@ -87,7 +87,7 @@ define <4 x i32> @fptosi_2f64_to_2i32(<2 x double> %a) {
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; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; AVX512F-NEXT: retq
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;
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; AVX512DQ-LABEL: fptosi_2f64_to_2i32:
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; AVX512DQ-LABEL: fptosi_2f64_to_4i32:
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; AVX512DQ: # BB#0:
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; AVX512DQ-NEXT: vcvttpd2qq %xmm0, %xmm0
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; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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@ -97,6 +97,46 @@ define <4 x i32> @fptosi_2f64_to_2i32(<2 x double> %a) {
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ret <4 x i32> %ext
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}
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define <2 x i32> @fptosi_2f64_to_2i32(<2 x double> %a) {
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; SSE-LABEL: fptosi_2f64_to_2i32:
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; SSE: # BB#0:
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; SSE-NEXT: cvttsd2si %xmm0, %rax
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; SSE-NEXT: movd %rax, %xmm1
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; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
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; SSE-NEXT: cvttsd2si %xmm0, %rax
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; SSE-NEXT: movd %rax, %xmm0
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; SSE-NEXT: movdqa %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: fptosi_2f64_to_2i32:
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; AVX: # BB#0:
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; AVX-NEXT: vcvttsd2si %xmm0, %rax
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; AVX-NEXT: vmovq %rax, %xmm1
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; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; AVX-NEXT: vcvttsd2si %xmm0, %rax
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; AVX-NEXT: vmovq %rax, %xmm0
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX-NEXT: retq
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;
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; AVX512F-LABEL: fptosi_2f64_to_2i32:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vcvttsd2si %xmm0, %rax
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; AVX512F-NEXT: vmovq %rax, %xmm1
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; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; AVX512F-NEXT: vcvttsd2si %xmm0, %rax
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; AVX512F-NEXT: vmovq %rax, %xmm0
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; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX512F-NEXT: retq
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;
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; AVX512DQ-LABEL: fptosi_2f64_to_2i32:
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; AVX512DQ: # BB#0:
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; AVX512DQ-NEXT: vcvttpd2qq %xmm0, %xmm0
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; AVX512DQ-NEXT: retq
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%cvt = fptosi <2 x double> %a to <2 x i32>
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ret <2 x i32> %cvt
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}
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define <4 x i32> @fptosi_4f64_to_2i32(<2 x double> %a) {
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; SSE-LABEL: fptosi_4f64_to_2i32:
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; SSE: # BB#0:
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@ -666,6 +706,41 @@ define <4 x i32> @fptoui_4f64_to_4i32(<4 x double> %a) {
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; Float to Signed Integer
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;
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define <2 x i32> @fptosi_2f32_to_2i32(<2 x float> %a) {
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; SSE-LABEL: fptosi_2f32_to_2i32:
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; SSE: # BB#0:
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; SSE-NEXT: cvttss2si %xmm0, %rax
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; SSE-NEXT: movd %rax, %xmm1
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; SSE-NEXT: cvttss2si %xmm0, %rax
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; SSE-NEXT: movd %rax, %xmm0
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; SSE-NEXT: movdqa %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: fptosi_2f32_to_2i32:
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; AVX: # BB#0:
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; AVX-NEXT: vcvttss2si %xmm0, %rax
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; AVX-NEXT: vmovq %rax, %xmm1
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; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; AVX-NEXT: vcvttss2si %xmm0, %rax
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; AVX-NEXT: vmovq %rax, %xmm0
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: fptosi_2f32_to_2i32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcvttss2si %xmm0, %rax
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; AVX512-NEXT: vmovq %rax, %xmm1
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; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; AVX512-NEXT: vcvttss2si %xmm0, %rax
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; AVX512-NEXT: vmovq %rax, %xmm0
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; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX512-NEXT: retq
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%cvt = fptosi <2 x float> %a to <2 x i32>
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ret <2 x i32> %cvt
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}
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define <4 x i32> @fptosi_4f32_to_4i32(<4 x float> %a) {
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; SSE-LABEL: fptosi_4f32_to_4i32:
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; SSE: # BB#0:
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