forked from OSchip/llvm-project
[X86] Remove ANY_EXTEND special case from canReduceVMulWidth
Removing this code doesn't affect any lit tests so it doesn't appear to be tested anymore. I assume it was when it was added, but I guess something else changed? Code coverage report also says its unused. I mostly didn't like that it seemed to count the sign bits as if it was a sign_extend, but then set isPositive as if it was a zero_extend. It feels like we should have picked one interpretation? Differential Revision: https://reviews.llvm.org/D54596 llvm-svn: 346995
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@ -34337,24 +34337,8 @@ static bool canReduceVMulWidth(SDNode *N, SelectionDAG &DAG, ShrinkMode &Mode) {
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for (unsigned i = 0; i < 2; i++) {
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SDValue Opd = N->getOperand(i);
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// DAG.ComputeNumSignBits return 1 for ISD::ANY_EXTEND, so we need to
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// compute signbits for it separately.
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if (Opd.getOpcode() == ISD::ANY_EXTEND) {
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// For anyextend, it is safe to assume an appropriate number of leading
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// sign/zero bits.
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if (Opd.getOperand(0).getValueType().getVectorElementType() == MVT::i8)
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SignBits[i] = 25;
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else if (Opd.getOperand(0).getValueType().getVectorElementType() ==
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MVT::i16)
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SignBits[i] = 17;
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else
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return false;
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IsPositive[i] = true;
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} else {
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SignBits[i] = DAG.ComputeNumSignBits(Opd);
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if (DAG.SignBitIsZero(Opd))
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IsPositive[i] = true;
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}
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SignBits[i] = DAG.ComputeNumSignBits(Opd);
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IsPositive[i] = DAG.SignBitIsZero(Opd);
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}
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bool AllPositive = IsPositive[0] && IsPositive[1];
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