forked from OSchip/llvm-project
Temporarily revert this patch, which probably breaks with the
tblgen patch reverted. llvm-svn: 25971
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parent
586b06281c
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22b4edfb42
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@ -369,11 +369,17 @@ bool X86DAGToDAGISel::SelectAddr(SDOperand N, SDOperand &Base, SDOperand &Scale,
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return false;
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return false;
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if (AM.BaseType == X86ISelAddressMode::RegBase) {
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if (AM.BaseType == X86ISelAddressMode::RegBase) {
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if (!AM.Base.Reg.Val)
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if (AM.Base.Reg.Val) {
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if (AM.Base.Reg.getOpcode() != ISD::Register)
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AM.Base.Reg = Select(AM.Base.Reg);
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} else {
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AM.Base.Reg = CurDAG->getRegister(0, MVT::i32);
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AM.Base.Reg = CurDAG->getRegister(0, MVT::i32);
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}
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}
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}
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if (!AM.IndexReg.Val)
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if (AM.IndexReg.Val)
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AM.IndexReg = Select(AM.IndexReg);
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else
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AM.IndexReg = CurDAG->getRegister(0, MVT::i32);
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AM.IndexReg = CurDAG->getRegister(0, MVT::i32);
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getAddressOperands(AM, Base, Scale, Index, Disp);
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getAddressOperands(AM, Base, Scale, Index, Disp);
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@ -435,6 +441,11 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDOperand N, SDOperand &Base,
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return false;
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return false;
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}
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}
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if (SelectBase)
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AM.Base.Reg = Select(AM.Base.Reg);
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if (SelectIndex)
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AM.IndexReg = Select(AM.IndexReg);
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getAddressOperands(AM, Base, Scale, Index, Disp);
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getAddressOperands(AM, Base, Scale, Index, Disp);
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return true;
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return true;
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}
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}
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@ -450,11 +461,6 @@ SDOperand X86DAGToDAGISel::Select(SDOperand N) {
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if (Opcode >= ISD::BUILTIN_OP_END && Opcode < X86ISD::FIRST_NUMBER)
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if (Opcode >= ISD::BUILTIN_OP_END && Opcode < X86ISD::FIRST_NUMBER)
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return N; // Already selected.
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return N; // Already selected.
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// These are probably emitted by SelectAddr().
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if (Opcode == ISD::TargetConstant || Opcode == ISD::TargetConstantPool ||
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Opcode == ISD::TargetFrameIndex || Opcode == ISD::TargetGlobalAddress)
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return N;
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std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
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std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
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if (CGMI != CodeGenMap.end()) return CGMI->second;
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if (CGMI != CodeGenMap.end()) return CGMI->second;
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